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STA308

3.0 CONFIGURATION REGISTER A (ADDRESS 00H)

3.0.1 Master Clock Select

The STA308 will support sample rates of 32kHz, 44.1kHz, 48Khz, 88.2kHz, 96kHz, 176.4kHz, and 192kHz.

Therefore the internal clock will be:

– 65.536Mhz for 32kHz

– 90.3168Mhz for 44.1khz, 88.2kHz, and 176.4kHz

– 98.304Mhz for 48kHz, 96kHz, and 192kHz

The external clock frequency provided to the XTI pin must be a multiple of the input sample frequency(fs). The

relationship between the input clock and the input sample rate is determined by both the MCSx and the IRx (In-

put Rate) register bits. The MCSx bits determine the PLL factor generating the internal clock and the IRx bits

determine the oversampling ratio used internally.

3.0.2 Interpolation Ratio Select

The STA308 has variable interpolation (oversampling) settings such that internal processing and DDX output

rates remain consistent. The first processing block interpolates by either 4 times, 2 times, or 1 time (pass-

through). The IR bits determine the oversampling ratio of this interpolation.

Table 2. IR bit settings as a function of Input Sample Rate.

BIT

D7

D6

D5

D4

D3

D2

D1

D0

NAME

MPC

MPE

BME

IR1

IR0

MCS2

MCS1

MCS0

RST

10

0

0

0

0

1

1

BIT

R/W

RST

NAME

DESCRIPTION

0

R/W

1

MCS0

sample frequency and the input clock.

1

R/W

1

MCS1

2

R/W

0

MCS2

Input Sample Rate

IR

MCS(2..0)

1xx

011

010

001

000

32, 44.1, 48

00

128fs

256fs

384fs

512fs

768fs

88.2, 96

01

64fs

128fs

192fs

256fs

384fs

176.4, 192

10

64fs

128fs

192fs

256fs

384fs

BIT

R/W

RST

NAME

DESCRIPTION

2

R/W

0

IR0

sample frequency

3

R/W

0

IR1

Input Sample Rate

Fs

IR(1,0)

32kHz

00

4 times oversampling

44.1kHz

00

4 times oversampling

48kHz

00

4 times oversampling

88.2kHz

01

2 times oversampling

96kHz

01

2 times oversampling

176.4kHz

10

Pass-Through

192kHz

10

Pass-Through