STA308

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3.40 Coefficient a1 Data Register Bits 7..0 (address 28h)

3.41 Coefficient b1 Data Register Bits 23..16 (address 29h)

3.42 Coefficient b1 Data Register Bits 15..8 (address 2Ah)

3.43 Coefficient b1 Data Register Bits 7..0 (address 2Bh)

3.44 Coefficient Write Control Register (address 2Ch)

Coefficients for EQ and Bass Management are handled internally in the STA308 via RAM. Access to this RAM

is available to the user via an I2C register interface. A collection of I2C registers is dedicated to this function.

One contains a coefficient base address, five sets of three store the values of the 24-bit coefficients to be written

or that were read, and one contains bits used to control the writing of the coefficient(s) to RAM. The following

are step instructions for reading and writing coefficients.

Reading a coefficient from RAM

– write 8-bit address to I2C register 1Ch

– ead top 8-bits of coefficient in I2C address 1Dh

– ead middle 8-bits of coefficient in I2C address 1Eh

– ead bottom 8-bits of coefficient in I2C address 1Fh

Writing a single coefficient to RAM

– write 8-bit address to I2C register 1Ch

– write top 8-bits of coefficient in I2C address 1Dh

– write middle 8-bits of coefficient in I2C address 1Eh

– write bottom 8-bits of coefficient in I2C address 1Fh

– write 1 to W1 bit in I2C address 2Bh

BIT

D7

D6

D5

D4

D3

D2

D1

D0

NAME

C4B7

C4B6

C4B5

C4B4

C4B3

C4B2

C4B1

C4B0

RST

00

0

0

0

0

0

0

BIT

D7

D6

D5

D4

D3

D2

D1

D0

NAME

C5B23

C5B22

C5B21

C5B20

C5B19

C5B18

C5B17

C5B16

RST

00

0

0

0

0

0

0

BIT

D7

D6

D5

D4

D3

D2

D1

D0

NAME

C5B15

C5B14

C5B13

C5B12

C5B11

C5B10

C5B9

C5B8

RST

00

0

0

0

0

0

0

BIT

D7

D6

D5

D4

D3

D2

D1

D0

NAME

C5B7

C5B6

C5B5

C5B4

C5B3

C5B2

C5B1

C5B0

RST

00

0

0

0

0

0

0

BIT

D7

D6

D5

D4

D3

D2

D1

D0

NAME

WA

W1

RST