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STA308 数据表(PDF) 12 Page - STMicroelectronics

部件名 STA308
功能描述  MULTICHANNEL DIGITAL AUDIO PROCESSOR WITH DDX?
PDF  33 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STA308 数据表(HTML) 12 Page - STMicroelectronics

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3.0.3 Bass Management Enable
Channel 6 of the STA308 features a bass management mode that enables redirection of information in all other
channels to this channel and which can then be filtered appropriately using the EQ(Biquad) section. Setting the
BME bit selects the output of the scale and mix block for channel 6 instead of the output of the channel mapping
block. The settings for the scale and mix block are provided by the CxBMS registers
3.0.4 DDX Headphone Output Enable
Channels 7 and 8 of the STA308 have the option to be processed for headphones. The headphone output can
then be driven using an appropriate output device. This signal is a fully differential 3-wire drive called DDX
Headphone
3.0.5 Max Power Correction
Setting the MPC bit turns on special processing that corrects the DDX power device at high power. This mode
should lower the THD+N of a full DDX system at maximum power output and slightly below. This mode will only
be operational in OM= 00 or 10.
3.1 Configuration Register B (address 01h)
3.1.1 DSP Bypass
Setting the DSPB bit bypasses the biquad and bass/treble functionality of the STA308.
3.1.2 Zero-Detect Mute Enable
Setting the ZDE bit enables the zero-detect automatic mute.
The zero-detect circuit looks at the input data to each processing channel after the channel mapping block. If
any channel receives 2048 consecutive zero value samples (regardless of fs) then that individual channel is
muted if this function is enabled.
BIT
R/W
RST
NAME
DESCRIPTION
5
R/W
0
BME
Bass Management Enable : 0 – No Bass Management
1 – Bass Management operation on channel 6, scale and add inputs
BIT
R/W
RST
NAME
DESCRIPTION
6
R/W
0
HPE
DDX Headphone Enable :
0 – Channels 7,8 normal DDX operation.
1 – Channels 7,8 DDX Headphone operation.
BIT
R/W
RST
NAME
DESCRIPTION
7
R/W
1
MPC
Max Power Correction : Setting of 1 enables DDX correction for THD reduction
near maximum power output.
BIT
D7
D6
D5
D4
D3
D2
D1
D0
NAME
DRC
ZCE
SAIFB
SAI2
SAI1
SAI0
ZDE
DSPB
RST
01
0
0
0
0
1
0
BIT
R/W
RST
NAME
DESCRIPTION
0
R/W
0
DSPB
DSP Bypass Bit : 0 – Normal Operation
1 – Bypass of Biquad and Bass/Treble Functionality
BIT
R/W
RST
NAME
DESCRIPTION
1
R/W
1
ZDE
Zero-Detect Mute Enable : Setting of 1 enables the
automatic zero-detect mute



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