1 MSPS, 14-Bit, Simultaneous Sampling

SAR ADC with PGA and Four Comparators

AD7264

Rev. A

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FEATURES

Dual, simultaneous sampling, 14-bit, 2-channel ADC

True differential analog inputs

Programmable gain stage: ×1, ×2, ×3, ×4, ×6, ×8, ×12, ×16,

×24, ×32, ×48, ×64, ×96, ×128

Throughput rate per ADC

1 MSPS for AD7264

500 kSPS for AD7264-5

Analog input impedance: >1 GΩ

Wide input bandwidth

−3 dB bandwidth: 1.7 MHz at gain = 2

4 on-chip comparators

SNR: 78 dB typical at gain = 2, 71 dB typical at gain = 32

Device offset calibration

System gain calibration

On-chip reference: 2.5 V

−40°C to +105°C operation

High speed serial interface

Compatible with SPI, QSPI™, MICROWIRE™, and DSP

48-lead LFCSP and LQFP packages

GENERAL DESCRIPTION

The AD7264 is a dual, 14-bit, high speed, low power, successive

approximation ADC that operates from a single 5 V power supply

and features throughput rates of up to 1 MSPS per on-chip

ADC (500 kSPS for the AD7264-5). Two complete ADC func-

tions allow simultaneous sampling and conversion of two

channels. Each ADC is preceded by a true differential analog

input with a PGA. There are 14 gain settings available: ×1, ×2,

×3, ×4, ×6, ×8, ×12, ×16, ×24, ×32, ×48, ×64, ×96, and ×128.

The AD7264 contains four comparators. Comparator A and

Comparator B are optimized for low power, whereas Comparator C

and Comparator D have fast propagation delays. The AD7264

features a calibration function to remove any device offset error

and programmable gain adjust registers to allow for input path

(for example, sensor) offset and gain compensation. The AD7264

has an on-chip 2.5 V reference that can be disabled if an external

reference is preferred. The AD7264 is available in 48-lead LFCSP

and LQFP packages.

The AD7264 is ideally suited for monitoring small amplitude

signals from a variety of sensors. The parts include all the

functionality needed for monitoring the position feedback signals

from a variety of analog encoders used in motor control systems.

FUNCTIONAL BLOCK DIAGRAM

AGND

DGND

PD1

PD2

COMP

COMP

COMP

COMP

PGA

T/H

BUF

T/H

BUF

PGA

14-BIT

SUCCESSIVE

APPROXIMATION

ADC

REF

14-BIT

SUCCESSIVE

APPROXIMATION

ADC

CONTROL

LOGIC

OUTPUT

DRIVERS

OUTPUT

DRIVERS

OUTPUT

DRIVERS

OUTPUT

DRIVERS

G3

G2

G1

G0

CAL

CS

SCLK

REFSEL

AD7264

OUTPUT

DRIVERS

OUTPUT

DRIVERS

Figure 1.

PRODUCT HIGHLIGHTS

1.

Integrated PGA with a variety of flexible gain settings to

allow detection and conversion of low level analog signals.

2.

Each PGA is followed by a dual simultaneous sampling

ADC, featuring throughput rates of 1 MSPS per ADC

(500 kSPS for the AD7264-5). The conversion result of

both ADCs is simultaneously available on separate data

lines or in succession on one data line if only one serial

port is available.

3.

Four integrated comparators that can be used to count

signals from pole sensors in motor control applications.

4.

Internal 2.5 V reference.