ADE7569 datasheet(76/148 Pages) AD

76 / 148 page

ADE75xx/ADE71xx

Preliminary Technical Data

Rev. PrE | Page 76 of 148

enhanced serial port functionality

with a dedicated timer for

baud rate generation with a fractional divisor and additional

error detection. See Table 121 and UART serial interface

section.

Interrupt SFRs:

There is a two-tiered interrupt system standard

in the 8052 core. The priority level for each interrupt source is

individually selectable as high or low. The

ADE75XX/ADE71XX enhances this interrupt system by

creating in essence a third interrupt tier for a highest priority

power supply management interrupt, PSM - See Interrupt

System section.

I/O Port SFRs:

The 8052 core supports four I/O ports, P0

through P3 where Ports 0 and 2 are typically used for access to

external code and data spaces. The ADE75XX/ADE71XX,

unlike standard 8052 products, provides internal nonvolatile

Flash memory so that an external code space is unnecessary.

The on-chip LCD driver requires many pins, some of which are

dedicated for LCD functionality and others that can be

configured at LCD or general purpose I/O. Due to the limited

number of I/O pins, the ADE75XX/ADE71XX does not allow

access to external code and data spaces.

The ADE75XX/ADE71XX provides 20 pins that can be used for

general purpose I/O. These pins are mapped to Ports 0, 1 and 2

and are accessed through three bit-addressable 8052 SFRs P0,

P1 and P2. Another enhanced feature of the

ADE75XX/ADE71XX is that the weak pull-ups standard on

8052 Ports 1, 2 and 3 can be disabled to make open drain

outputs, as is standard on Port 0. The weak pull-ups can be

enabled on a pin by pin basis. See the I/O Ports section.

Power Control Register (PCON, 0x87):

The 8052 core defines

two power down modes; power down and idle. The

ADE75XX/ADE71XX enhances the power control capability

of the traditional 8052 MCU with additional power

management functions. The POWCON register is used to

define power control specific functionality for the

ADE75XX/ADE71XX. The Program Control SFR (PCON,

0x87) is not bit addressable. See the Power Management section.

The ADE75XX/ADE71XX provides many other peripherals not

standard to the 8052 core.

•

ADE Energy Measurement DSP

•

RTC

•

LCD driver

•

Battery Switchover/Power Management

•

Temperature ADC

•

Battery ADC

•

SPI/I2C communication

•

Flash Memory controller

•

Watchdog Timer

MEMORY OVERVIEW

The ADE75XX/ADE71XX contains three memory blocks:

•

16 kbytes of on-chip Flash/EE program and data memory

•

256 bytes of general-purpose RAM

•

256 bytes of internal extended RAM (XRAM)

The 256 bytes of general-purpose RAM shares the upper 128

bytes of its address space with Special Function Registers. All of

the memory spaces are shown in Figure 54. The addressing

mode specifies which memory space to access.

General Purpose RAM:

General purpose RAM resides in

memory locations 0x00 through 0xFF. It contains the register

banks.

07H

0FH

17H

1FH

2FH

7FH

00H

08H

10H

18H

20H

RESET VALUE OF

STACK POINTER

30H

FOUR BANKS OF EIGHT

REGISTERS

R0 TO R7

BIT-ADDRESSABLE

(BIT ADDRESSES)

GENERAL-PURPOSE

AREA

BANKS

SELECTED

VIA

BITS IN PSW

Figure 56. Lower 128 Bytes of Internal Data Memory

Addresses 0x80 through 0xFF of General Purpose RAM are

shared with the Special Function Registers. The mode of

addressing determines which memory space is accessed as

shown in Figure 57.

ACCESSIBLE BY

DIRECT ADDRESSING

ONLY

ACCESSIBLE BY

INDIRECT ADDRESSING

ONLY

ACCESSIBLE BY

DIRECT AND INDIRECT

ADDRESSING

GENERAL PURPOSE RAM

SPECIAL FUNCTION REGISTERS (SFRs)

00h

7Fh

80h

FFh

ADE7569 数据表(PDF) 76 Page - Analog Devices

ADE7569 数据表(HTML) 76 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载

链接网址

ADE7569 数据表(PDF) 76 Page - Analog Devices

ADE7569 数据表(HTML) 76 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表 下载

链接网址

数据表下载