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ADE7569 数据表(PDF) 33 Page - Analog Devices |
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ADE7569 数据表(HTML) 33 Page - Analog Devices |
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33 / 148 page  Preliminary Technical Data ADE75xx/ADE71xx Rev. PrE | Page 33 of 148 3.3V PERIPHERALS AND WAKEUP EVENTS Some of the 3.3V peripherals are capable of waking the ADE75XX/ADE71XX from PSM2. The events that can cause the ADE75XX/ADE71XX to wake from PSM2 are listed in the Wakeup Events column in Table 25. Table 25. 3.3V Peripherals and Wakeup Events 3.3V Peripheral Wakeup Event Wakeup Enable Bits Flag Interrupt Vector Comments Temperature ADC ΔT Maskable - ITADC The temperature ADC can wake-up the 8052 if the ITADC flag is set . This flag is set according to the description in the Temperature measurement section. This wakeup event can be disabled by disabling temperature measurements in the Temperature and Voltage ADC Delta SFR (DIFFPROG, 0xF3) in PSM2. VDCIN ADC ΔV Maskable FVADC IPSM The VDCIN measurement can wake-up the 8052. The FVADC is set according to the description in the External Voltage Measurement section. This wakeup event can be disabled by clearing the EVADC in the Power Management Interrupt Enable SFR (IPSME, 0xEC). Power Supply Management PSR Non- maskable PSR IPSM The 8052 will wake up if the power supply is restored (if VSW switches to be connected to VDD). The VSWSOURCE flag, bit 6 of the Peripheral Configuration SFR (PERIPH, 0xF4) SFR, is set to indicate that VSW is connected to VDD. This is a nonmaskable wakeup event. Midnight Non- maskable Midnight IRTC The ADE75XX/ADE71XX will wake up at midnight every day to update its calendar. This event is a nonmaskable wakeup event. RTC Alarm Maskable Alarm IRTC Set an alarm to wake the ADE75XX/ADE71XX after the desired amount of time. The RTC Alarm is enabled by setting the alarm bit in the RTC Configuration SFR (TIMECON, 0xA1). All I/O pins are treated as inputs. The weak pull-up on each I/O pin can be disabled individually in the Port 0 Weak pull- up enable SFR (PINMAP0, 0xB2), Port 1 Weak pull-up enable SFR (PINMAP1, 0xB3) and Port 2 Weak pull-up enable SFR (PINMAP2, 0xB4) to decrease current consumption and also avoid powering up disabled peripheral through the internal pull-up through the I2C port for example. The interrupts can be enabled/disabled. INT0 INT0PROG =1 - IE0 The edge of the interrupt is selected by TCON.IT0 The IE0 flag bit in the TCON register will not be affected. INT1 INT1PROG [2:0 ]= 11X - IE1 The edge of the interrupt is selected by TCON.IT1 The IE1 flag bit in the TCON register will not be affected. I/O Ports RX Edge RXPROG [1:0] = 11 PERIPH.7 (RXFG) - An RX Edge event will occur if a rising or falling edge is detected on the RX line External Reset RESET Non- maskable - - If the RESET pin is brought low while the ADE75XX/ADE71XX is in PSM2, it will wake up to PSM1. LCD - - - - The LCD can be enabled/disabled in PSM2. The LCD data memory will remain intact. Scratchpad - - - - The 4 SCRATCHx registers will remain intact in PSM2. TRANSITIONING BETWEEN OPERATING MODES The operating mode of the ADE75XX/ADE71XX is determined by the power supply connected to VSW. Therefore a change in the power supply such as when VSW switches from VDD to VBAT or when VSW switches to VDD changes the operating mode. This section describes events that change the operating mode. Automatic Battery Switchover (PSM0 to PSM1) If any of the enabled battery switchover events occur (see the Battery Switchover section), VSW switches to VBAT. This switchover results in a transition from the PSM0 to PSM1 |
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