ADE7569 datasheet(24/148 Pages) AD

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ADE75xx/ADE71xx

Preliminary Technical Data

Rev. PrE | Page 24 of 148

Controls the function of INT0

INT0PRG

Function

INT0 input disabled

INT0PRG

INT0 input enabled

Table 13. Power Management Interrupt Flag SFR (IPSMF, 0xF8)

Bit

Location

Bit

Addr.

Bit Name

Default

Value

Description

0xFF

FPSR

Power Supply Restored Interrupt flag.

Set when the VDD power supply has been restored. This occurs when the source

of VSW changes from VBAT to VDD.

0xFE

FPSM

PSM Interrupt flag.

Set when an enabled PSM interrupt condition occurs.

0xFD

FSAG

Voltage SAG Interrupt flag.

Set when an ADE energy measurement SAG condition occurs.

0xFC

RESERVED

This bit must be kept cleared for proper operation

0xFB

FVADC

VDCIN ADC interrupt flag.

Set when VDCIN changes by VDCINDIF or when a VDCIN measurement is ready.

0xFA

FBAT

VBAT Monitor interrupt flag.

Set when VBAT falls below BATVTH or when the VBAT measurement is ready.

0xF9

FBSO

Battery Switchover interrupt flag.

Set when VSW switches from VDD to VBAT.

0xF8

FVDC

VDCIN Monitor interrupt flag.

Set when VDCIN falls below 1.2V.

Table 14. Battery Switchover Configuration SFR (BATPR, 0xF5)

Bit

Location

Bit

Mnemonic

Default

Value

Description

7-2

Reserved

These bits must be kept to 0 for proper operation

Control bits for Battery Switchover.

BATPRG [1:0]

Function

Battery Swichover Enabled on Low VDD

Battery Swichover Enabled on Low VDD and Low VDCIN

1-0

BATPRG [1:0]

Battery Switchover Disabled

Table 15. Peripheral Configuration SFR (PERIPH, 0xF4)

Bit

Location

Bit

Mnemonic

Default

Value

Description

RXFLAG

If set, indicates that a RX Edge event triggered wakeup from PSM2

Indicates the power supply that is connected internally to VSW.

0 VSW=VBAT

VSWSOURCE

1 VSW=VDD

VDD_OK

If set, indicates that VDD power supply is ok for operation

PLL_FLT

If set, indicates that a PLL fault occurred where the PLL lost lock. Set the PLL_FLT_ACK bit in the

Start ADC Measurement SFR (ADCGO, 0xD8) SFR to acknowledge the fault and clear the

PLL_FLT bit

REF_BAT_EN

If set, Internal voltage reference enabled in PSM2 mode. This bit should be set to maintain the

LCD in PSM2 mode.

Reserved

This bit should be kept to zero

Controls the function of the P1.0/RX pin.

RXPROG [1:0]

Function

1-0

RXPROG[1:0]

GPIO

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