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D

U

Pipelined High Performance

8-bit Microcontroller

ver 3.10

OVERVIEW

DP8051CPU is an ultra high perform-

ance, speed optimized

soft core of a single-

chip 8-bit embedded controller dedicated for

operation with fast (typically on-chip) and slow

(off-chip) memories. The core has been de-

signed with a special concern about perform-

ance to power consumption

ratio. This ratio

is extended by an advanced power manage-

ment unit PMU.

DP8051CPU soft core is 100% binary-

compatible with the industry standard 8051 8-

bit microcontroller. There are two configura-

tions of DP8051CPU: Harward where internal

data and program buses are separated, and

von Neumann

with common program and ex-

ternal data bus. DP8051CPU has Pipelined

RISC architecture 10 times faster compared

to standard architecture and executes 85-200

million instructions

per second. This per-

formance can also be exploited to great advan-

tage in low power applications where the core

can be clocked over ten times more slowly

than the original implementation for no per-

formance penalty.

DP8051CPU is delivered with fully auto-

mated testbench

and complete set of tests

allowing easy package validation at each stage

of SoC design flow.

CPU FEATURES

standard 8051

execute instructions 10 times faster com-

pared to standard 8051

Memory

external (off-chip) Program Memory

Memory

States solution for wide range of memories

speed

Wait States solution for wide range of

memories speed

easy connection to memory

writes.

Registers