T80C5112-RKSCL datasheet(67/97 Pages) ATMEL

67 / 97 page

Rev. B - November 10, 2000

Preliminary

T80C5112

Reset Value = 00X0 0000b

Bit addressable

Table 42. IE Register

IE - Interrupt Enable Register (A8h)

ET1

EX1

ET0

EX0

Bit Number

Bit

Mnemonic

Description

Enable All interrupt bit

Clear to disable all interrupts.

Set to enable all interrupts.

If EA=1, each interrupt source is individually enabled or disabled by setting or clearing its interrupt

enable bit.

PCA Interrupt Enable

Clear to disable the the PCA interrupt.

Set to enable the the PCA interrupt.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Serial port Enable bit

Clear to disable serial port interrupt.

Set to enable serial port interrupt.

ET1

Timer 1 overflow interrupt Enable bit

Clear to disable timer 1 overflow interrupt.

Set to enable timer 1 overflow interrupt.

EX1

External interrupt 1 Enable bit

Clear to disable external interrupt 1.

Set to enable external interrupt 1.

ET0

Timer 0 overflow interrupt Enable bit

Clear to disable timer 0 overflow interrupt.

Set to enable timer 0 overflow interrupt.

EX0

External interrupt 0 Enable bit

Clear to disable external interrupt 0.

Set to enable external interrupt 0.

T80C5112-RKSCL 数据表(PDF) 67 Page - ATMEL Corporation

T80C5112-RKSCL 数据表(HTML) 67 Page - ATMEL Corporation

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