T80C5112-RKSCL datasheet(76/97 Pages) ATMEL

76 / 97 page

Rev. B - November 10, 2000

Preliminary

T80C5112

Figure 33. Set-Up Modes Configuration

17.3.3. Programming Algorithm

The Improved Quick Pulse algorithm is based on the Quick Pulse algorithm and decreases the number of pulses

applied during byte programming from 25 to 1.

To program the T80C5112 the following sequence must be exercised:

· Step 1: Activate the combination of control signals.

· Step 2: Input the valid address on the address lines.

· Step 3: Input the appropriate data on the data lines.

· Step 4: Raise RST/VPP from VCC to VPP (typical 12.75V).

· Step 5: Pulse ALE/PROG once.

· Step 6: Lower RST/VPP from VPP to VCC

Repeat step 2 through 6 changing the address and data for the entire array or until the end of the object file is

reached (See Figure 34).

17.3.4. Verify algorithm

Code array verify must be done after each byte or block of bytes is programmed. In either case, a complete verify

of the programmed array will ensure reliable programming of the T80C5112.

P 2.7 is used to enable data output.

To verify the T80C5112 code the following sequence must be exercised:

· Step 1: Activate the combination of program and control signals.

· Step 2: Input the valid address on the address lines.

· Step 3: Read data on the data lines.

Repeat step 2 through 3 changing the address for the entire array verification (See Figure 34).

The encryption array cannot be directly verified. Verification of the encryption array is done by observing that the

code array is well encrypted.

+5V

VCC

P0.0-P0.7

P1.0-P1.7

P2.0-P2.5

P3.4-P3.5

VSS

GND

D0-D7

A0-A7

A8-A15

RST

RST/VPP

ALE/PROG

PSEN

P2.6

P2.7

P3.3

P3.7

P3.6

XTAL1

4 to 6 MHz

CONTROL

SIGNALS*

PROGRAM

SIGNALS*

* See Table 49. for proper value on these inputs

+5V

T80C5112-RKSCL 数据表(PDF) 76 Page - ATMEL Corporation

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