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T80C5112-RKSIL 数据表(PDF) 69 Page - ATMEL Corporation |
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T80C5112-RKSIL 数据表(HTML) 69 Page - ATMEL Corporation |
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69 / 97 page ![]() Rev. B - November 10, 2000 69 Preliminary T80C5112 Reset Value = X0X0 0000b Bit addressable. Table 44. IPL0 Register IPL0 - Interrupt Priority Register (B8h) 7 6 5 4 3 2 1 0 - PPC - PS PT1 PX1 PT0 PX0 Bit Number Bit Mnemonic Description 7 - Reserved The value read from this bit is indeterminate. Do not set this bit. 6 PPCL PCA Counter Interrupt Priority bit Refer to PPCH for priority level 5 - Reserved The value read from this bit is indeterminate. Do not set this bit. 4 PSL Serial port Priority bit Refer to PSH for priority level. 3 PT1L Timer 1 overflow interrupt Priority bit Refer to PT1H for priority level. 2 PX1L External interrupt 1 Priority bit Refer to PX1H for priority level. 1 PT0L Timer 0 overflow interrupt Priority bit Refer to PT0H for priority level. 0 PX0L External interrupt 0 Priority bit Refer to PX0H for priority level. |
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