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STE2002 数据表(PDF) 11 Page - STMicroelectronics |
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STE2002 数据表(HTML) 11 Page - STMicroelectronics |
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11 / 51 page ![]() 11/51 STE2002 Figure 10. Automatic data RAM writing sequence with X-Y Carriage Return (V=0; MX=0) Figure 11. Automatic data RAM writing sequence with X-Y Carriage Return (V=1; MX=0) Figure 12. Automatic data RAM writing sequence with X-Y Carriage Return (V=0; MX=1) Figure 13. Automatic data RAM writing sequence with X-Y Carriage Return (V=1; MX=1) BANK 0 BANK 1 BANK 2 Y CARR BANK 11 BANK 12 0123 124 125 126 127 X CARR BANK 0 BANK 1 BANK 2 Y CARR BANK 11 BANK 12 0123 124 125 126 127 X CARR BANK 0 BANK 1 BANK 2 Y CARR BANK 11 BANK 12 0 1 2 3 124 125 126 127 X CARR BANK 0 BANK 1 BANK 2 Y CARR BANK 11 BANK 12 0 1 2 3 124 125 126 127 X CARR |
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