STE2002 datasheet(24/51 Pages) STMICROELECTRONICS

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STE2002

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Figure 35. Reading Sequence

Parallel Interface

The STE2002 parallel Interface is a bidirectional link between the display driver and the application supervisor.

It consists of eleven lines: eight data lines (from DB7 to DB0) and three control lines. The control lines are: en-

able (E) for data latch, PD/C for mode selection and R/W for reading or writing.

The data lines and the control line values are internally latched on E rising edge (fig. 50).

When the parallel interface is selected, if R/W line is set to “one”, D0-D7 lines are configured as output drivers

(low impedence) and it is possible to read the driver I2C address (Fig. 51)

READING SEQUENCE

Write a "00000000" Instruction

Source 8 pulses on SCLK and

Read the I2C Address or Status Byte On SOUT

END OF READING SEQUENCE

SOUT Buffer Configured in High Impedence

LR0078

SOUT Buffer becomes active (Low Impedence)

note: 1) these data are not read by the display Diver

2) SDIN and SOUT can be short circuited if the processor can configure

serial output buffers in high impedence during data read

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