M48T02 datasheet(15/24 Pages) STMICROELECTRONICS

15 / 24 page

M48T02, M48T12

Clock operations

15/24

Figure 8.

Crystal accuracy across temperature

Figure 9.

Clock calibration

3.5

VCC noise and negative going transients

ICC transients, including those produced by output switching, can produce voltage

fluctuations, resulting in spikes on the VCC bus. These transients can be reduced if

capacitors are used to store energy which stabilizes the VCC bus. The energy stored in the

bypass capacitors will be released as low going spikes are generated or energy will be

absorbed when overshoots occur. A ceramic bypass capacitor value of 0.1µF (as shown in

Figure 10 on page 16) is recommended in order to provide the needed filtering.

In addition to transients that are caused by normal SRAM operation, power cycling can

generate negative voltage spikes on VCC that drive it to values below VSS by as much as

one volt. These negative spikes can cause data corruption in the SRAM while in battery

backup mode. To protect from these voltage spikes, it is recommended to connect a

AI02124

-80

-60

-100

-40

-20

ΔF

= -0.038

(T - T

2 ± 10%

ppm

0 = 25 °C

ppm

°C

AI00594B

NORMAL

POSITIVE

CALIBRATION

NEGATIVE

CALIBRATION

M48T02 数据表(PDF) 15 Page - STMicroelectronics

M48T02 数据表(HTML) 15 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

数据表下载