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ADE3800XT 数据表(PDF) 112 Page - STMicroelectronics

部件名 ADE3800XT
功能描述  Analog LCD Display Engine for XGA and SXGA Resolutions with Embedded LVDS and RSDS Transmitters
PDF  138 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ADE3800XT 数据表(HTML) 112 Page - STMicroelectronics

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Register Description by Block
ADE3800
112/138
I2C shadow mode is supported for individual comparators, pulses and windows. New values are loaded into
the shadow buffer area by slow I2C then the transfer command and shadow target are written into
tcon_shadow_ctrl. At the next event, the data is transferred in a single clock cycle.
TCON_X_0
0BA0
[4:0]
R/W
00
output selection for tcon pin 0
00*: 0
01: 1
02: pulse0
03: pulse1
04: pulse2
05: pulse3
06: pulse4
07: pulse5
08: window0
09: window1
0A: window2
0B: window3
0C: vtoggle0
0D: vtoggle1
0E: vtoggle2
0F: polarity
10: srtd8
11: srtd9
12: srtd10
13: srtd11
14: srtd12
15: srtd13
16: srtd14
17: srtd15
18 – 1F: reserved
TCON_X_1
0BA1
TCON_X_2
0BA2
TCON_X_3
0BA3
TCON_X_4
0BA4
TCON_X_5
0BA5
TCON_X_6
0BA6
TCON_X_7
0BA7
TCON_X_OHSYNC
0BA8
TCON_X_OVSYNC
0BA9
TCON_X_OENAB
0BAA
TCON_X_GAMMA_A
0BAB
TCON_X_GAMMA_B
0BAC
TCON_X_SRGB
0BAD
TCON_X_PGEN
0BAE
TCON_X_OSD_LUT
0BAF
SCL_TCON_I2C_SPARE_REG
0x0A37
[0]
R/W
0
[7:1] - Reserved
[0] - LVDS_DE_SOURCE_SELECT
0: Use DE generated by TCON_OENAB
1: Use DE generated by TCON_OSD_LUT
(without 16 pixels latency)
Table 40: Shadow Mapping
source
comparator
pulse
window
tcon_shadow_buf_0[7:0]
tcon_comp_X[7:0]
tcon_pulse_X_set[7:0]
tcon_window_X_left[7:0]
tcon_shadow_buf_1[4:0]
tcon_comp_X[12:8]
tcon_pulse_X_set[11:8]
tcon_window_X_left[11:8]
tcon_shadow_buf_2[7:0]
NA
tcon_pulse_X_rst[7:0]
tcon_window_X_right[7:0]
tcon_shadow_buf_3[6:0]
NA
tcon_pulse_X_rst[15:8]
tcon_window_X_right[11:8]
tcon_shadow_buf_4[7:0]
NA
NA
tcon_window_X_top[7:0]
tcon_shadow_buf_5[3:0]
NA
NA
tcon_window_X_top[11:8]
tcon_shadow_buf_6[7:0]
NA
NA
tcon_window_X_bottom[7:0]
tcon_shadow_buf_7[4:0]
NA
NA
tcon_window_X_bottom[12:8]
Table 39: Register Map (Sheet 7 of 7)
Register Name
Addr.
Bits
Mode
Rst
Description



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