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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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ADE3800XT 数据表(PDF) 116 Page - STMicroelectronics |
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ADE3800XT 数据表(HTML) 116 Page - STMicroelectronics |
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116 / 138 page  Register Description by Block ADE3800 116/138 ANA_LVDSANA5 0065 [7] R/W C0 LVDS B power control (for LVDS Channel [7:4], LVDS clk 1) 0: on 1*: off [6] LVDS A power control (for LVDS Channel [3:0], LVDS clk 0) 0: on 1*: off [5] Output mode select 0*: RSDS (also powers down PLL) 1: LVDS [4:0] LVDS Iref Bias current setting 10000: 420uA 00011: 168uA 00010: 178uA 00001: 189uA 00000*: 201uA (normal) 11111: 202uA 11110: 216.3uA 11101: 233uA 11100: 252uA ANA_LVDSANA7 0067 [7] R 00 LVDS Channel [7:4] power status [6] LVDS Channel [3:0] power status [5] LVDS/RSDS/PLL Global Power status [4] PLL powerdown status = [ANA_LVDSANA4[0] OR ANA_LVDSANA2[7] OR (NOT ANA_LVDSANA5[5])] [3] PLL up status [2] PLL down status [1:0] PLL range status Table 41: LVDS/RSDS Registers (Sheet 3 of 5) Register Name Address Bits Mode Rst Description |
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