STV2310 datasheet(29/112 Pages) STMICROELECTRONICS

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STV2310

Functional Description

4.12

Output FIFO and Line-locked Ouput Pixel Clock Generator

4.12.1 General Description

The Output FIFO and Line-Locked Output Pixel Clock Generator block has two functions:

Handle the active line data received from the Output Scaler and Format Converter and the

ancillary data from the VBI slicer.

The active video line data is provided on 3 buses: Y, Cr and Cb. The output flow is on 8 bit and

multiplexes the Y, Cr and Cb flows. Before being multiplexed, a programmable attenuation can

be applied to the Cr, Cb data. For every output line, digital preambles for synchronization and

ancillary data (when available) are inserted in the output flow in compliance with standard ITU-

R BT 656.

Generate the Output Pixel Clock and associated signals.

A line-locked output pixel clock is generated. This output clock is a multiple of the input line

frequency. There are 4 possible multiples:

● 1716 or 1728 in Normal Pixel mode,

● 1560 or 1888 in Square Pixel mode.

When there is no input signal, the output data can be blanked in option.

When required the STV2310 is able to enlarge the vertical blanking area. On the other hand it

is possible to disable the blanking mode during the VBI, using the "pass through" mode. (The

"pass through" mode must not be selected when the TXT VBI slice is used).

4.12.2 Output Data

There are 4 data output standards which are a combination of 525/625 input standards and Normal/

Square pixel format. There are four possible multiples:

● 1716 or 1728 in Normal Pixel mode,

● 1560 or 1888 in Square Pixel mode.

For each output standard, the blanking code (Cb = 80h, Y = 10h, Cr = 80h, Y = 10h...) is used in the

active line section during the Vertical Blanking Interval (VBI). (See Figure 18.)

Table 12: Frame Output Standards

Output Standard

Input Standard

525/60 Hz

625/50 Hz

525/60 Hz

Pixel Format

Normal

Square

Blanking (bytes)

268 + 8

280 + 8

344 + 8

272 + 8

Active Video (bytes)

1440

1536

1280

Vertical Blanking

Interval1

1. Lines are numbered in compliance with specification ITU-R BT470.

Lines 1 to 19

Lines 264 to 282

Lines 1 to 22

Lines 311 to 335

Lines 624 and 625

Lines 1 to 22

Lines 311 to 335

Lines 624 and 625

Lines 1 to 19

Lines 264 to 282

Vsync SIgnal

Synchronized with the output pixel clock. See below.

Hsync Signal

Synchronized with the output pixel clock.

Field Signal

Synchronized with the Hsync signal output pixel clock.

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