STW5095 datasheet(13/73 Pages) STMICROELECTRONICS

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Functional description

STw5095

12/72

Functional description

4.1

Power supply

STw5095 can have different supply voltages for different blocks, to optimize performance,

power consumption and connectivity. See

Operative supply voltage on page 52 for voltage

definition.

The correct sequence to apply supply voltage is to set first (and unset last) the digital I/O

supply (VCCIO). The other supply voltages can be set in any order and can be disconnected

individually, if needed. Disconnection does not cause any harm to the device and no extra

current is pulled from any supply during this operation. Moreover if a voltage conflict is

detected, like VCCA < VCC (not allowed), simply all blocks connected to VCCA are set to

power down and no extra current is pulled from supply.

When VCCIO is set and VCC (digital supply) is not set, all the digital output pins are in high

impedance state, while the digital inputs are disconnected to avoid power consumption for

any input voltage value between GND and VCCIO. Before VCC is disconnected the device

has to be reset (SWRES bit in CR30).

When the analog supply (VCCA) is set and VCC is not set, all the analog inputs are in high

impedance state.

The control registers are powered by VCC pin (digital supply) so if this pin is disconnected

all the information stored in control registers is lost. When the digital supply voltage is set, a

power-on-reset (POR) circuit sets all the registers content to the default value and then

generates an IRQ signal writing 1 in bits PORMSK and POREV in CR31 and CR32

respectively.

All supplies must be on during operation.

4.2

Device programming

STw5095 can be programmed by writing Control Registers with SPI or I2C compatible

control interface (both slave). The interface is always active, there is no need to have the

master clock running to program the device registers.

The choice between the two interfaces is done via an input pin (CMOD):

CMOD connected to GND: I2C compatible mode selected

The device address is selected with AS pin:

When this mode is selected control registers are accessed through pins:

SCLK (clock)

SDA (serial data out/in, open drain)

CMOD connected to VCCIO: SPI compatible mode selected

When this mode is selected control registers are accessed through:

CSB (chip select, active low)

SCLK (clock)

SDIN (serial data in)

AD_OCK or DA_OCK or IRQ (serial data out, if selected)

AS connected to GND: chip address 00110101(35hex) for reading, 00110100 (34hex) for writing

AS connected to VCCIO: chip address 00110111(37hex) for reading, 00110110 (36hex) for writing

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