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STW5095 数据表(PDF) 15 Page - STMicroelectronics

部件名 STW5095
功能描述  Low-power asynchronous stereo audio Codec with integrated power amplifiers
PDF  73 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STW5095 数据表(HTML) 15 Page - STMicroelectronics

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Functional description
STw5095
14/72
Figure 3.
Power up block diagram
4.4
Master clock
The master clock pin (AMCK) accepts any frequency from 4 MHz to 32 MHz. The 4-32 MHz
range is divided in sub-ranges that have to be programmed in bits CKRANGE in CR30. The
jitter and spectral properties of this clock have a direct impact on the DAC and ADC
performance because it is used to directly or by integer division drive the continuous-time to
sampled-time interfaces.
Note that AMCK clock des not need to have any relation to any other digital or analog input
or output.
AMCK can be either a squarewave or a sinewave, bit AMCKSIN in CR30 selects the proper
input mode. When a sinewave is used as input, AMCK pin must be decoupled with a
capacitor. Specification for sinusoidal input can be found in
Section 10.2: AMCK with
sinusoidal input on page 55.
The AMCK clock is not needed when only analog functions are used. For this purpose an
internal oscillator with no external components can be used to operate the device (see
Analog-only operation on page 19).
POWERUP
ENANA
STw5095
ENMIXL
ENMIXL
ENHPVCM
ENHPL
ENLS
ENHPR
ENMICR
ENMICL
ENLINR
ENLINL
ENOSC
ENADCR
ENADCL
ENDACR
ENDACL
AUDIO I/F
ENLOL
ENLOR
ENHSD
ENPLL
DAMAST ENDAOCK
ADMAST ENADOCK
MBIAS
ENAMCK
ENDACKGEN
ENADCKGEN
ENOSC=1
ENOSC=0



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