STW5095 datasheet(17/73 Pages) STMICROELECTRONICS

17 / 73 page

Functional description

STw5095

16/72

Data is exchanged with MSB first and left channel data first in all formats. Data word-length

is selected with bits DAWL in CR26 and ADWL in CR27. AD_DATA pin, outside the selected

time slot, is in the impedance condition selected by bit ADHIZ in CR28 in all data formats

except Right-Aligned-Format.

In the following paragraphs SYNC, CK and DATA will be used when the distinction between

AD and DA is not relevant. When Master Mode is selected (bits DAMAST and ADMAST in

CR22 and CR25 respectively) the SYNC and CK clocks are generated internally. In addition,

an oversampled clock can be generated for each interface (AD_OCK and DA_OCK). The

OCK clock is available in Slave Mode also, if needed.

The AD and DA interfaces can also be used as a single bidirectional interface when they are

configured with the same format (Delayed, DSP, etc.) and AD_SYNC is connected to

DA_SYNC and DA_CK to AD_CK. Master Mode is still available selecting ADMAST or

DAMAST (not both).

The interfaces features are controlled with control registers CR26, CR27 and CR28.

Supported operating formats:

●

Delayed-Format (I2S compatible) (DAFORM or ADFORM =000): the Audio Interface

is I2S compatible (

Figure 9 on page 47). The number of CK periods within one SYNC

period is not relevant, as long as enough CK periods are used to transfer the data and

the maximum frequency limit specified for bit clock is not exceeded. CK can be either a

continuous clock or a sequence of bursts. In master mode there are 32 CK periods per

SYNC period (that means 16 CK periods per channel) when the word length is 16 bit,

while there are 64 CK periods per SYNC period (or 32 CK periods per channel) when

word length is 18bit or higher. Bits ADSYNCP, DASYNCP and ADCKP, DACKP affect

the interface format inverting the polarity of SYNC and CK pins respectively.

●

Left-Aligned-Format (DAFORM or ADFORM =001): this format is equivalent to

Delayed-Format without the 1 bit clock delay at the beginning of each frame (

Figure 9

on page 47).

●

Right-Aligned-Format (DAFORM or ADFORM =010): this format is equivalent to

Delayed-Format, except that the Audio Data is right aligned and that the number of CK

periods is fixed to 64 for each SYNC period (

Figure 9 on page 47).

●

DSP-Format (DAFORM or ADFORM =011) in this format the Audio Interface starting

from a frame sync pulse on SYNC receives (DA) or sends (AD) the Left and Right data

one after the other (

Figure 10 on page 48). The number of CK periods within one

SYNC period is not relevant, as long as enough CK periods are used to transfer the

data and the maximum frequency limit specified for bit clock is not exceeded. CK can

be either a continuous clock or a sequence of bursts. In Master Mode there are 32 CK

periods per SYNC period when the word length is 16 bit, while there are 64 CK periods

per SYNC period when word length is 18bit or higher. Bit CKP (ADCKP and DACKP)

affects the interface format inverting the polarity of CK pin. Bit SYNCP (ADSYNCP and

DASYNCP) switches between delayed (SYNCP=0) and non delayed (SYNCP=1)

formats.

DSP-Format is suited to interface with a Multi-Channel Serial Port.

●

SPI-Format (DAFORM or ADFORM =100) in this format Left and Right data is received

with separate data burst. Every burst is identified with a low level on SYNC signal

(

Figure 10 on page 48). There is no timing difference between the Left and Right data

burst: the two channels are identified by the startup order: the first burst after AD path

or DA path power-up identifies the Left channel data, the second one is the Right

channel data, then Left and Right data repeat one after the other. CK must have 16

periods per channel in case of 16 bit data word and 32 periods per channel in case of

STW5095 数据表(PDF) 17 Page - STMicroelectronics

STW5095 数据表(HTML) 17 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73

数据表下载