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STPCE1EEBC 数据表(PDF) 12 Page - STMicroelectronics |
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STPCE1EEBC 数据表(HTML) 12 Page - STMicroelectronics |
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12 / 87 page ![]() PIN DESCRIPTION 12/87 Release 1.3 - January 29, 2002 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. Table 2-2. Definition of Signal Pins Signal Name Dir Buffer Type2 Description Qty BASIC CLOCKS AND RESETS SYSRSETI# I SCHMITT_FT System Power Good Input 1 SYSRSTO# O BD8STRP_FT System Reset Output 1 XTALI I ANA 14.3 MHz Crystal Input - External Oscillator Input 1 XTALO I/O OSCI13B 14.3 MHz Crystal Output 1 HCLK I/O BD4STRP_FT Host Clock (Test) 1 GP_CLK O BT8TRP_TC General Purpose Clock 1 VDD_xxx_PLL 1 Power Supply for PLL Clocks MEMORY INTERFACE MCLKI I TLCHT_TC Memory Clock Input 1 MCLKO O BT8TRP_TC Memory Clock Output 1 CS#[1:0] O BD8STRP_TC DIMM Chip Select 2 CS#[3]/MA[13]/BA[1] O BD16STARUQP_TC DIMM Chip Select/ Memory Address/ Bank Address 1 CS#[2]/MA[12] O BD16STARUQP_TC DIMM Chip Select/ Bank Address 1 MA[10:0] O BD16STARUQP_TC Memory Row & Column Address 12 MD[48:10], [7:2] I/O BD8TRP_TC Memory Data 45 MD[63:49], [9:8], [1:0] I/O BD8STRUP_FT Memory Data 19 RAS#[1:0] O BD16STARUQP_TC Row Address Strobe 2 CAS#[1:0] O BD16STARUQP_TC Column Address Strobe 2 MWE# O BD16STARUQP_TC Write Enable 1 DQM[7:0] O BD8STRP_TC Data Input/Output Mask 8 PCI INTERFACE PCI_CLKI I TLCHT_FT 33 MHz PCI Input Clock 1 PCI_CLKO O BT8TRP_TC 33 MHz PCI Output Clock (from internal PLL) 1 AD[31:0] I/O BD8PCIARP_FT PCI Address / Data 32 CBE[3:0] I/O BD8PCIARP_FT Bus Commands / Byte Enables 4 FRAME# I/O BD8PCIARP_FT Cycle Frame 1 IRDY# I/O BD8PCIARP_FT Initiator Ready 1 TRDY# I/O BD8PCIARP_FT Target Ready 1 LOCK# I TLCHT_FT PCI Lock 1 DEVSEL# I/O BD8PCIARP_FT Device Select 1 STOP# I/O BD8PCIARP_FT Stop Transaction 1 PAR I/O BD8PCIARP_FT Parity Signal Transactions 1 SERR# O BD8PCIARP_FT System Error 1 PCI_REQ#[2:0] I BD8PCIARP_FT PCI Request 3 PCI_GNT#[2:0] O BD8PCIARP_FT PCI Grant 3 PCI_INT[3:0] I BD4STRUP_FT PCI Interrupt Request 4 ISA CONTROL Note1: These pins must be connected to the 2.5 V power supply. They must not be connected to the 3.3V supply. Note2: See Table 2-3 for buffer type descriptions. |
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