M30833FJGP datasheet(4/94 Pages) RENESAS

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1.3 Block Diagram

Figure 1.1 shows a block diagram of the M32C/83 Group (M32C/83, M32C/83T) microcomputer.

Figure 1.1 M32C/83 Group (M32C/83, M32C/83T) Block Diagram

Port P0

Port P1

Port P2

Port P3

Port P4

Port P5

Port P6

Port P7

Port P15

Port P14

Port P13

Port P12

Port P10

Port P9

Port P8

P85

Port P11

R0H

R0L

R1H

R1L

NOTES:

1. Ports P11 to P15 are provided only in the 144-pin package.

2. Included only in the 144-pin package.

3. Can be used only in the 144-pin package.

FLG

INTB

ISP

USP

SVF

SVP

VCT

Multiplier

M32C/80 Series CPU Core

Clock Generation Circuit

XIN - XOUT

XCIN - XCOUT

On-chip Oscillator

PLL Frequency Synthesizer

A/D Converter:

2 circuits

Standard: 18 inputs

(2)

Maximum: 34 inputs

(2)

UART/Clock Synchronous Serial I/O:

5 channels

X/Y Converter:

16 bits x 16 bits

CRC Calculation Circuit (CCITT):

X16+X12+X5+1

Timer (16 bits)

Timer A: 5 channels

Timer B: 6 channels

Three-phase Motor Control Circuit

Watchdog Timer (15 bits)

D/A Converter

(8 bits x 2 channels)

Intelligent I/O

( 4 Groups )

Peripheral Functions

ROM

RAM

Memory

(Note1)

8888888

DMAC

DMACII

DRAMC

CAN Module

Time Measurement: 12 channels

(2)

Wave Generating: 28 channels

(2)

Communication Functions:

Clock Synchronous Serial I/O, UART,

IEBus, HDLC Data Processing, 8-bit or

16-bit Clock Synchronous Serial I/O

(3)

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