M30833FJGP datasheet(2/94 Pages) RENESAS

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1.2 Performance Overview

Tables 1.1 and 1.2 list performance overview of the M32C/83 Group (M32C/83, M32C/83T).

Table 1.1 M32C/83 Group (M32C/83, M32C/83T) Performance (144-Pin Package)

Characteristic

Performance

M32C/83

M32C/83T

CPU

Basic Instructions

108 instructions

Minimum Instruction Execution Time 31.3 ns (f(BCLK)=32 MHz, VCC=4.2 to 5.5 V)(3) 31.3 ns (f(BCLK)=32 MHz, VCC=4.2 to 5.5 V)(3)

50 ns (f(BCLK)=20 MHz, VCC=3.0 to 5.5 V)

Operating Mode

Single-chip mode, Memory expansion

Single-chip mode

mode and Microprocessor mode

Address Space

16 Mbytes

Memory Capacity

See Table 1.3

Peripheral I/O Port

123 I/O pins and 1 input pin

Function

Multifunction Timer

Timer A: 16 bits x 5 channels, Timer B: 16 bits x 6 channels

Three-phase motor control circuit

Intelligent I/O

Time measurement function: 16 bits x 12 channels

Waveform generating function: 16 bits x 28 channels

Communication function (Clock synchronous serial I/O, Clock asynchronous se-

rial I/O, HDLC data processing, Clock synchronous variable length serial I/O,

IEBus(1), 8-bit or 16-bit Clock synchronous serial I/O)

Serial I/O

5 Channels

Clock synchronous serial I/O, Clock asynchronous serial I/O, IEBus(1), I2C bus(2)

CAN Module

1 channel

Supporting CAN 2.0B specification

A/D Converter

10-bit A/D converter: 2 circuit, 34 channels

D/A Converter

8 bits x 2 channels

DMAC

4 channels

DMAC II

Can be activated by all peripheral function interrupt sources

Immediate transfer, Calculation transfer and Chain transfer functions

DRAM

CAS before RAS refresh, Self-reflesh, EDO, EP

CRC Calculation Circuit

CRC-CCITT

X/Y Converter

16 bits x 16 bits

Watchdog Timer

15 bits x 1 channel (with prescaler)

Interrupt

42 internal and 8 external sources, 5 software sources, Interrupt priority level: 7

Clock Generation Circuit

4 circuits

Main clock oscillation circuit(*), Sub clock oscillation circuit(*), On-chip oscillator,

PLL frequency synthesizer

(*)Equipped with a built-in feedback resistor. Ceramic resonator or crystal oscilla-

tor must be connected externally

Oscillation Stop Detect Function

Main clock oscillation stop detect function

Electrical Supply Voltage

4.2 to 5.5 V (f(BCLK)=32 MHz)

Charact-

3.0 to 5.5 V (f(BCLK)=20 MHz, through VDC)

eristics

3.0 to 3.6 V (f(BCLK)=20 MHz,

not through VDC)

Power Consumption

41 mA (VCC=5 V, f(BCLK)=32 MHz)

38 mA (VCC=5 V, f(BCLK)=30 MHz)

38 mA (VCC=5 V, Vf(BCLK)=30 MHz)

26 mA (VCC=3.3 V, f(BCLK)=20 MHz)

470

µA (VCC=5 V, f(XCIN)=32 kHz,

470

µA (VCC=5 V, f(XCIN)=32 kHz,

in wait mode)

0.4

µA (VCC=5 V, stop mode)

340

µA (VCC=3.3 V, f(XCIN)=32 kHz,

through VDC, in wait mode)

5.0

µA (VCC=3.3 V, f(XCIN)=32 kHz,

not through VDC, in wait mode)

0.4

µA (VCC=5 V, stop mode)

0.4

µA (VCC=3.3 V, stop mode)

Flash

Program/Erase Supply Voltage

3.3

± 0.3 V or 5.0 ± 0.5 V

5.0

± 0.5 V

Memory

Program and Erase Endurance

100 times

Operating Ambient Temperature

–20 to 85oC, –40 to 85oC (optional)

–40 to 85oC (T version)

Package

144-pin plastic molded LQFP

NOTES:

1. IEBus is a trademark of NEC Electronics Corporation.

2. I2C bus is a trademark of Koninklijke Philips Electronics N. V.

3. Contact our sales office if 30-MHz or higher frequency is required.

All options are on a request basis.

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