4584 datasheet(59/157 Pages) RENESAS

59 / 157 page

Rev.3.00

2004.08.06

page 59 of 155

REJ03B0010-0300Z

4584 Group

PRELIMINARY

Notice: This is not a final specification.

Some parametric limits are subject to change.

(4) Return signal

An external wakeup signal is used to return from the RAM back-up

mode because the oscillation is stopped. Table 17 shows the return

condition for each return source.

(5) Related registers

• Key-on wakeup control register K0

tion. Set the contents of this register through register A with the

TK0A instruction. In addition, the TAK0 instruction can be used to

transfer the contents of register K0 to register A.

• Key-on wakeup control register K1

level selection for port P0. Set the contents of this register

through register A with the TK1A instruction. In addition, the

TAK1 instruction can be used to transfer the contents of register

K1 to register A.

• Key-on wakeup control register K2

and return condition function. Set the contents of this register

through register A with the TK2A instruction. In addition, the

TAK2 instruction can be used to transfer the contents of register

K2 to register A.

Table 17 Return source and return condition

Remarks

The key-on wakeup function can be selected with 2 port units. Select the re-

turn level (“L” level or “H” level), and return condition (return by level or

edge) with the register K1 according to the external state before going into

the RAM back-up state.

The key-on wakeup function can be selected with 2 port units. Set the port

using the key-on wakeup function to “H” level before going into the RAM

back-up state.

Select the return level (“L” level or “H” level) with the registers I1 and I2 ac-

cording to the external state, and return condition (return by level or edge)

with the register K2 before going into the RAM back-up state.

Return condition

Return by an external “H” level or

“L” level input, or rising edge

( “ L ”

→ “ H ” ) or falling edge

(“H”

→“L”).

Return by an external “L” level in-

put.

Return by an external “H” level or

“L” level input, or rising edge

( “ L ”

→ “ H ” ) or falling edge

(“H”

→“L”).

The external interrupt request flags

(EXF0, EXF1) are not set.

Return source

Ports P00–P03

Ports P10–P13

INT0

INT1

• Pull-up control register PU0

tor. Set the contents of this register through register A with the

TPU0A instruction. In addition, the TAPU0 instruction can be

used to transfer the contents of register PU0 to register A.

• Pull-up control register PU1

tor. Set the contents of this register through register A with the

TPU1A instruction. In addition, the TAPU1 instruction can be

used to transfer the contents of register PU0 to register A.

• External interrupt control register I1

put control of INT0 pin, and return input level. Set the contents of

this register through register A with the TI1A instruction. In addi-

tion, the TAI1 instruction can be used to transfer the contents of

• External interrupt control register I2

put control of INT1 pin, and return input level. Set the contents of

this register through register A with the TI2A instruction. In addi-

tion, the TAI2 instruction can be used to transfer the contents of

4584 数据表(PDF) 59 Page - Renesas Technology Corp

4584 数据表(HTML) 59 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载