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4584 数据表(PDF) 13 Page - Renesas Technology Corp |
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4584 数据表(HTML) 13 Page - Renesas Technology Corp |
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13 / 157 page  Rev.3.00 2004.08.06 page 13 of 155 REJ03B0010-0300Z 4584 Group PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change. Port block diagram (5) This symbol represents a parasitic diode on the port. 2: Applied potential to these ports must be VDD or less. 3: As for details, refer to the external interrupt circuit structure. Notes 1: P32 (Note 1) (Note 2) Register A A2 A2 IAP3 instruction OP3A instruction D T Q P30/INT0 (Note 1) (Note 2) Register A A0 A0 IAP3 instruction OP3A instruction D T Q External 0 interrupt circuit External 0 interrupt Key-on wakeup input Timer 1 count start synchronous circuit input Period measurement circuit input P31/INT1 (Note 1) (Note 2) Register A A1 A1 IAP3 instruction OP3A instruction D T Q External 1 interrupt circuit External 1 interrupt Key-on wakeup input Timer 3 count start synchronous circuit input P33 (Note 1) (Note 2) Register A A3 A3 IAP3 instruction OP3A instruction D T Q (Note 3) (Note 3) |
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