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H8/300H 数据表(PDF) 39 Page - Renesas Technology Corp

部件名 H8/300H
功能描述  Renesas 16-Bit Single-Chip Microcomputer
PDF  552 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8/300H 数据表(HTML) 39 Page - Renesas Technology Corp

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Section 2 CPU
CPU30H2C_000120030300
Rev. 3.00 May 15, 2007 Page 7 of 516
REJ09B0152-0300
Section 2 CPU
This LSI has an H8/300H CPU with an internal 32-bit architecture that is upward compatible with
the H8/300 CPU, and supports only normal mode, which has a 64-Kbyte address space.
• Upward-compatible with H8/300 CPUs
Can execute H8/300 CPUs object programs
Additional eight 16-bit extended registers
32-bit transfer and arithmetic and logic instructions are added
Signed multiply and divide instructions are added.
• General-register architecture
Sixteen 16-bit general registers also usable as sixteen 8-bit registers and eight 16-bit registers,
or eight 32-bit registers
• Sixty-two basic instructions
8/16/32-bit data transfer and arithmetic and logic instructions
Multiply and divide instructions
Powerful bit-manipulation instructions
• Eight addressing modes
Register direct [Rn]
Register indirect [@ERn]
Register indirect with displacement [@(d:16,ERn) or @(d:24,ERn)]
Register indirect with post-increment or pre-decrement [@ERn+ or @–ERn]
Absolute address [@aa:8, @aa:16, @aa:24]
Immediate [#xx:8, #xx:16, or #xx:32]
Program-counter relative [@(d:8,PC) or @(d:16,PC)]
Memory indirect [@@aa:8]
• 64-Kbyte address space
• High-speed operation
All frequently-used instructions execute in one or two states
8/16/32-bit register-register add/subtract: 2 states
8
× 8-bit register-register multiply:
14 states
16 ÷ 8-bit register-register divide:
14 states
16
× 16-bit register-register multiply:
22 states
32 ÷ 16-bit register-register divide:
22 states



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