HD6417618A datasheet(144/646 Pages) RENESAS

部件名	HD6417618A

功能描述	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

PDF	646 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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144 / 646 page

Section 7 Bus State Controller (BSC)

Rev. 6.00 Jun. 12, 2007 Page 112 of 610

REJ09B0131-0600

7.3.4

Area 0 Memory Type and Memory Bus Width

The memory bus width in this LSI can be set for each area. In area 0, the bus width is selected

from 8 bits and 16 bits at a power-on reset by the external pin setting. The bus width of other areas

is set by the register. The correspondence between the memory type, external pin (MD3), and bus

width is listed in table 7.4.

Table 7.4

Correspondence between External Pin (MD3), Memory Type, and Bus Width

for CS0

MD3

Memory Type

Bus Width

Normal memory

8 bits

16 bits

7.3.5

Data Alignment

This LSI supports the big endian and little endian methods of data alignment. The data alignment

is specified using the external pin (MD5) at a power-on reset as shown in table 7.5.

Table 7.5

Correspondence between External Pin (MD5) and Endians

MD5

Endian

Big endian

Little endian

HD6417618A 数据表(PDF) 144 Page - Renesas Technology Corp