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H8SX/1663 数据表(PDF) 882 Page - Renesas Technology Corp

部件名 H8SX/1663
功能描述  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8SX/1663 数据表(HTML) 882 Page - Renesas Technology Corp

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Section 17 I
2C Bus Interface 2 (IIC2)
Rev.1.00 Jun. 07, 2006 Page 830 of 1102
REJ09B0294-0100
Bit
Bit Name
Initial
Value
R/W
Description
2
AL
0
R/W
Arbitration Lost Flag
This flag indicates that arbitration was lost in master
mode.
When two or more master devices attempt to seize the
bus at nearly the same time, the I
2C bus monitors SDA,
and if the I
2C bus interface detects data differing from
the data it sent, it sets AL to 1 to indicate that the bus
has been taken by another master.
[Setting conditions]
• When the internal SDA and the SDA pin level
disagree at the rising of SCL in master transmit
mode
• When the SDA pin outputs a high level in master
mode while a start condition is detected
[Clearing condition]
• When 0 is written to this bit after reading AL = 1
(When the CPU is used to clear this flag by writing
0 while the corresponding interrupt is enabled, be
sure to read the flag after writing 0 to it.)
1
AAS
0
R/W
Slave Address Recognition Flag
In slave receive mode, this flag is set to 1 when the first
frame following a start condition matches bits SVA6 to
SVA0 in SAR.
[Setting conditions]
• When the slave address is detected in slave
receive mode
• When the general call address is detected in slave
receive mode
[Clearing condition]
• When 0 is written to this bit after reading AAS = 1
(When the CPU is used to clear this flag by writing
0 while the corresponding interrupt is enabled, be
sure to read the flag after writing 0 to it.)



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