H8SXSLASH1663 datasheet(897/1158 Pages) RENESAS

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H8SX/1663 数据表(PDF) 897 Page - Renesas Technology Corp

部件名	H8SX/1663

功能描述	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

PDF	1158 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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Section 17 I

2C Bus Interface 2 (IIC2)

Rev.1.00 Jun. 07, 2006 Page 845 of 1102

REJ09B0294-0100

TDRE = 1?

Yes

[1]

[4]

[5]

[6]

[7]

[8]

[9]

[2]

[3]

Yes

TEND = 1?

[1] Clear the AAS flag.

[2] Set the transmit data for ICDRT (except the last byte).

[3] Wait for ICDRT empty.

[4] Set the last byte of transmit data.

[5] Wait for the last byte of data to be transmitted.

[6] Clear the TEND flag.

[7] Set to slave receive mode.

[8] Dummy read ICDRR to free the SCL line.

[9] Clear the TDRE flag.

Slave transmit mode

Clear AAS in ICSR

Write the transmit data

to ICDRT

Read TRD in ICSR

Last byte?

Write the transmit data

to ICDRT

Read TEND in ICSR

Clear TEND in ICSR

Set TRS = 0 (ICCRA)

Dummy read ICDRR

Clear TDRE in ICSR

End

Figure 17.16 Sample Flowchart for Slave Transmit Mode

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