TDA9115 datasheet(27/45 Pages) STMICROELECTRONICS

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TDA9115

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Figure 7. Horizontal timing diagram

Figure 8. HFly input configuration

9.3.6 Output section

The H-drive signal is inhibited (high level) during

flyback pulse, and also when VCC is too low, when

2C bus bit HBOutEn is set to 0 (default position).

The PLL2 is followed by a rapid phase shifting

which accepts the signal from H-moiré canceller

(see sub chapter Horizontal moiré cancellation on

page 27)

The output stage consists of a NPN bipolar tran-

sistor, the collector of which is routed to HOut pin

(see Figure 9).

Figure 9. HOut configuration

Non-conductive state of HOT (Horizontal Output

Transistor) must correspond to non-conductive

state of the device output transistor.

9.3.7 Soft-start and soft-stop on H-drive

The soft-start and soft-stop procedure is carried

out at each switch-on or switch-off of the H-drive

signal via HBOutEn I2C bus bit to protect external

power components. By its second function, the ex-

ternal capacitor on pin HPosF is used to time out

this procedure, during which the duty cycle of H-

drive signal starts at its maximum (“tHoff/TH for soft

start/stop” in electrical specifications) and slowly

decreases. This is controlled by voltage on pin

HPosF. See Figure 10 and sub chapter Safety

functions on page 33.

9.3.8 Horizontal moiré cancellation

The horizontal moiré canceller is intended to blur a

potential beat between the horizontal video pixel

period and the CRT pixel width, which causes vis-

ible moiré patterns in the picture.

On pin HMoiré, it generates a square line-synchro-

nized waveform with amplitude adjustable through

HMOIRE I2C bus control.

The behaviour of horizontal moiré is to be opti-

mised for different deflection design configurations

using HMoiré I2C bus bit. This bit is to be kept at 0

for common architecture (B+ and EHT common

regulation) and at 1 for separated architecture (B+

and EHT each regulated separately).

H-flyback

PLL2

H-drive

current

VThrHFly

control

(on HOut)

tHoff

H-drive

region

H-drive

region

tph(max)

inhibited

tS: HOT storage time

H-Osc

VS(0)

7/8TH

VHOThrHi

max.

med.

min.

VHPosF

H-sync

(polarized)

REF1

tHph

min

max

HPOS

2C)

max.

med.

min.

PLL1 lock

(internal)

VHOThrLo

(VCO)

control

forced high

forced low

OFF

GND

~20k

Ω

HFly 12

~500

Ω

int.

ext.

int.

ext.

HOut

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