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TDA9115 数据表(PDF) 32 Page - STMicroelectronics |
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TDA9115 数据表(HTML) 32 Page - STMicroelectronics |
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32 / 45 page ![]() TDA9115 32/45 certain delay (tBTrigDel /TH) after middle of H-fly- back. The output is set On at the end of a short pulse generated by the monostable trigger. Timing of reset of the R-S flip-flop affects duty cy- cle of the output square signal and so the energy transferred from DC/DC converter input to its out- put. A reset edge is provided by comparator C2 if the voltage on pin BISense exceeds the internal threshold VThrBIsCurr. This represents current limi- tation if a voltage proportional to the current through the power component or deflection stage is available on pin BISense. This threshold is af- fected by the voltage on pin HPosF, which rises at soft start and descends at soft stop. This ensures self-contained soft control of duty cycle of the out- put signal on pin BOut. Refer to Figure 10. Another condition for the reset of the R-S flip-flop, OR-ed with the one described before, is that the voltage on pin BISense exceeds the voltage VC1, which depends on the voltage applied on input BISense of the error amplifier O1. The two voltages are compared, and the reset signal generated by the comparator C1. The error amplifier amplifies (with a factor defined by external components) the dif- ference between the input voltage proportional to DC/DC convertor output voltage and internal refer- ence VBReg. Both step-up (DC/DC converter output voltage higher than its input voltage) and step-down (out- put voltage lower than input) are possible. DC/DC controller Off-to-On edge timing Figure 14. DC/DC converter controller block diagram BOutPh (Sad07/ D7) BOHEdge (Sad17/ D3) Timing of Off-to-O n transition on BOut outpu t 0 don’t care Middle of H-flyback plus tBTrigDel 1 0 Falling edge of H-drive signal 1 1 Rising edge of H-drive signal C1 BRegIn BComp BIsense BOut N type Soft start H-drive edge H-flyback + - + - + - S Q R ~500ns Monostable HBOutEn P type VCC Feedback C2 BOutPol (I2C) XRayAlarm (I2C) BOutPh (I2C) HPosF VThrBIsCurr (+delay) BOHEdge (I2C) 2R R VBReg I1 I2 I3 VC1 O1 |
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