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CS2000-OTP 数据表(PDF) 24 Page - Cirrus Logic |
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CS2000-OTP 数据表(HTML) 24 Page - Cirrus Logic |
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24 / 30 page ![]() CS2000-OTP 24 DS758PP1 6.1.2 Auxiliary Output Source Selection (AuxOutSrc[1:0]) Selects the source of the AUX_OUT signal. Note: When set to 11, the AuxLockCfg global parameter sets the polarity and driver type (“AUX PLL Lock Output Configuration (AuxLockCfg)” on page 25). 6.1.3 Auto R-Modifier Enable (AutoRMod) Controls the automatic ratio modifier function. 6.1.4 Lock Clock Ratio (LockClk[1:0]) Selects one of the four stored User Defined Ratios for use in the dynamic ratio based Hybrid PLL Mode. Note: The User Defined Ratio for the static ratio based Frequency Synthesizer mode is the ratio that corresponds with the currently chosen configuration set as shown in Figure 16 on page 23. 6.1.5 Fractional-N Source for Frequency Synthesizer (FracNSrc) Selects static or dynamic ratio mode when auto clock switching is disabled. 6.2 Ratio 0 - 3 The four 32-bit User Defined Ratios are stored in the CS2000’s one time programmable memory. See “Out- put to Input Frequency Ratio Configuration” on page 14 and “Calculating the User Defined Ratio” on page 27 for more details. AuxOutSrc[1:0] Auxiliary Output Source 00 RefClk. 01 CLK_IN. 10 CLK_OUT. 11 PLL Lock Status Indicator. Application: “Auxiliary Output” on page 19 AutoRMod Automatic R-Mod State 0 Disabled. 1 Enabled. Application: “Automatic Ratio Modifier (Auto R-Mod) - Hybrid PLL Mode Only” on page 15 LockClk[1:0] CLK_IN Ratio Selection 00 Ratio 0. 01 Ratio 1. 10 Ratio 2. 11 Ratio 3. Application: Section 5.4.2 on page 14 FracNSrc Fractional-N Source Selection 0 Static Ratio directly from REFF for Frequency Synthesizer Mode 1 Dynamic Ratio from Digital PLL for Hybrid PLL Mode Application: “Fractional-N Source Selection” on page 16 |
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