ATSAM3703 datasheet(22/36 Pages) ATMEL

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6237A–DRMSD–29-May-06

ATSAM3703

9.4.2.2

Pinning

9.4.2.3

Timing

General Parameters

The DDR SDRAM is used with parameters defined in Table 9-4.

Table 9-3.

DDR SDRAM Pinning

ATSAM3703 Pin

DDR Pin

Description

A13, A12

Unused address bits (for larger device). Must be tied to zero.

WA11..WA0

A11..A0

Address

WBA1, WBA0

BA1, BA0

Bank address

WD3..WD0

DQ3..DQ0

Data

WDQS

DQS

Data strobe

Data mask. Must be tied to zero.

WCK, WCK

CK, CK

Differential clock

WCKE

CKE

Clock enable

-CS

Chip select. Must be tied to zero.

WCAS

CAS

Command

WRAS

RAS

WWE

VREF

SSTL_2 reference voltage. Must be connected to 1.25 V.

Table 9-4.

DDR SDRAM General Parameters

Symbol

Parameter

Value

Clock cycle time

10 ns

Mode Register

CAS Latency

2 cycles

Burst length

4 data

Burst type

sequential

Operating mode

normal

Extended mode register

DLL

enabled

Output drive strength

normal

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