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6237A–DRMSD–29-May-06

ATSAM3703

3.

Functional Description

3.1

DSP Array

The ATSAM3703 includes 3 on-chip DSPs.

Each DSP (P24) is built around a 2K x 24 RAM and a 1K x 24 ROM. The RAM contains both

data and P24 instructions; the ROM contains typical coefficients such as FFT cosines and win-

dowing. A P24 sends and receives audio samples through the Sync Bus. It can request external

data, such as compressed audio, through the Async Bus. Each P24 RAM can be accessed

through the Async Bus.

Each P24 is capable of typical MAC operation loops, including auto-indexing, bit reverse and

butterfly (multiplication of complex numbers). It also includes specialized audio instructions such

as state variable IIR filtering, envelope generation, linear interpolation and wavetable loop. The

DSPs have new 48-bit double precision instructions for improved Pro Audio applications.

One P24 is sufficient for processing one channel of MP3, implementing a multi-tap delay line or

a multi-tap transversal filter.

3.2

Sync Bus

The Sync Bus transfers data on a frame basis, typical frame rates being 32, 44.1, 48, 96 kHz.

Each frame is divided into 64 time slots. Each slot is divided into 4 bus cycles. Each P24 is

assigned a hardwired time slot (8 to 63), during which it may provide 24-bit data to the bus (up to

4 data samples). Each P24 can read data on the bus at any time, allowing inter P24 communica-

tion at the current sampling rate. Slots 0 to 7 are reserved for a specific router DSP, which also

handles audio out, audio in, and remix send.

3.3

Async Bus

The Async Bus is 24-bit data inside the chip and 16-bit outside.

The P16 processor normally masters the Async Bus, it can read/write the P24 memories and the

external or embedded ROM/RAM. However, each P24 can request a bus master cycle for

accessing external ROM/RAM or other P24 memories. This allows efficient intercommunication

between several P24s on asynchronous block basis. Specific P24 instructions FLOAT and FIX

allow to convert fixed point DSP data to floating point 16 bits. This allows for 20-bit audio

dynamic range when using 16-bit external memory.

3.4

Enhanced 16-bit Processor

This is the new enhanced version of P16 processor with added instructions allowing optimized

use of C compiler. Using the P16, widely used in Dream

large firmware investments from the SAM97xx series. A built-in ROM, connected to the P16

well as a debugger which uses a dedicated asynchronous serial line. The firmware can reside on

the built-in 16K x 16 EEPROM or it can be downloaded at power-up into the built-in 8K x 24

RAM from serial SmartMedia or host.

3.5

Memory Management Unit

The MMU handles transfer requests between the external or embedded RAM/ROM, the P16

and the P24s through the Async Bus. The ATSAM3703 includes an on chip 8K x 24 RAM.