CoreAI

v2.0

15

Table 25 • ADC Status Register (high-order)

Bits

Name

Function

7

CALIBRATE

ADC Calibrate

1 – The ADC is busy performing its calibration.

0 – The ADC is calibrated.

(Refer to the

Fusion datasheet for further information.)

6

SAMPLE

ADC Sample

1 – The ADC is sampling the selected analog input.

0 – Normal (no operation or the ADC has finished the sampling phase)

(Refer to the

Fusion datasheet for further information.)

5

BUSY

ADC Busy

1 – The ADC is busy performing an analog-to-digital conversion.

0 – The ADC is not busy.

(Refer to the

Fusion datasheet for further information.)

4

DATAVALID

ADC Data Valid

1 – The ADC contains valid data from an analog-to-digital conversion on the RESULT[11:0] outputs.

0 – Normal (no operation or current conversion continues)

(Refer to the

Fusion datasheet for further information.)

3:0

RESULT[11:8]

ADC Result (high-order)

These bits come from the RESULT[11:8] bits of the AB macro.

(Refer to the

Fusion datasheet for further information.)

Table 26 • Read FIFO Data Output Register

Bits

Name

Function

7:0

DOUT[7:0]

Read FIFO Data Output

If CoreAI is used in 8-bit APB read/write mode, the read FIFO must be read twice to retrieve one

ADC sample of result data (two bytes); in this case, the low-order byte would be read first and the

high-order byte second. Note also that in 8-bit APB read/write mode, the read FIFO will not become

empty until the last high-order byte has been read from the FIFO, i.e., an even number of reads

must occur. If CoreAI is used in 16-bit APB read/write mode, the read FIFO will be read as one 16-bit

word at once (with only the lower 12 bits being significant, since the ADC result has 12 bits of

resolution); in this case, DOUT[15:0] will appear on the PRDATA[15:0] output port, rather than

DOUT[7:0] appearing on PRDATA[7:0] as in 8-bit mode.