CY7C68053
MoBL-USB™ FX2LP18 USB
Microcontroller
Cypress Semiconductor Corporation
•
198 Champion Court
•
San Jose
, CA 95134-1709
•
408-943-2600
Document # 001-06120 Rev *I
Revised July 02, 2009
1. CY7C68053 Features
■ USB 2.0 – USB-IF High Speed and Full Speed Compliant
(TID# 40000188)
■ Single-Chip Integrated USB 2.0 Transceiver, Smart SIE,
and Enhanced 8051 Microprocessor
■ Ideal for Mobile Applications (Cell Phone, Smart Phones,
PDAs, MP3 Players)
❐ Ultra low power
❐ Suspend current: 20 µA (typical)
■ Software: 8051 Code runs from:
❐ Internal RAM, which is loaded from EEPROM
■ 16 kBytes of On-Chip Code/Data RAM
■ Four Programmable BULK/INTERRUPT/ISOCHRONOUS
endpoints
❐ Buffering options: double, triple, and quad
■ Additional Programmable (BULK/INTERRUPT) 64-Byte
Endpoint
■ 8 or 16-Bit External Data Interface
■ Smart Media Standard ECC Generation
■ GPIF (General Programmable Interface)
❐ Allows direct connection to most parallel interface
❐ Programmable waveform descriptors and configuration
registers to define waveforms
❐ Supports multiple Ready and Control outputs
■ Integrated, Industry Standard Enhanced 8051
❐ 48 MHz, 24 MHz, or 12 MHz CPU operation
❐ Four clocks per instruction cycle
❐ Three counter/timers
❐ Expanded interrupt system
❐ Two data pointers
■ 1.8V Core Operation
■ 1.8V to 3.3V I/O Operation
■ Vectored USB Interrupts and GPIF/FIFO Interrupts
■ Separate Data Buffers for Setup and Data Portions of a
CONTROL Transfer
■ Integrated I
2C Controller, runs at 100 or 400 kHz
■ Four Integrated FIFOs
❐ Integrated glue logic and FIFOs lower system cost
❐ Automatic conversion to and from 16-bit buses
❐ Master or slave operation
❐ Uses external clock or asynchronous strobes
❐ Easy interface to ASIC and DSP ICs
■ Available in Industrial Temperature Grade
■ Available in one Pb-free Package with up to 24 GPIOs
❐ 56-pin VFBGA (24 GPIOs)
x20
PLL
/0.5
/1.0
/2.0
8051 Core
12/24/48 MHz,
Four Clocks/Cycle
I
2
C
VCC
1.5K
D+
D–
GPIF
CY
Smart
USB
1.1/2.0
Engine
USB
2.0
XCVR
16 KB
RAM
4 KB
FIFO
Integrated
Full- and High-Speed
XCVR
Additional IOs (24)
CTL (3)
RDY (2)
24 MHz
Ext. XTAL
Enhanced USB Core
Simplifies 8051 Code
“Soft Configuration”
Easy Firmware Changes
FIFO and Endpoint Memory
(Master or Slave Operation)
General
Programmable I/F
Abundant IO
High-performance microprocessor
using standard tools
with lower-power options
Master
Connected for
Full-Speed
ECC
MoBL-USB FX2LP18
To Baseband Processors/
Application Processors/
ASICS/DSPs
8/16
Up to 96 MBytes/sec
Burst Rate
Block Diagram
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