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CY7C68053
Document # 001-06120 Rev *I
Page 32 of 40
9.11 Slave FIFO Synchronous Address
9.12 Slave FIFO Asynchronous Address
Table 23.Slave FIFO Synchronous Address Parameters[10]
Parameter
Description
Min
Max
Unit
tIFCLK
Interface clock period
20.83
200
ns
tSFA
FIFOADR[1:0] to clock setup time
25
ns
tFAH
Clock to FIFOADR[1:0] hold time
10
ns
Slave FIFO Asynchronous Address Parameters[19]
Parameter
Description
Min
Max
Unit
tSFA
FIFOADR[1:0] to SLRD/SLWR/PKTEND setup time
10
ns
tFAH
RD/WR/PKTEND to FIFOADR[1:0] hold time
10
ns
IFCLK
SLCS/FIFOADR [1:0]
tSFA
tFAH
Figure 18. Slave FIFO Synchronous Address Timing Diagram[16]
SLRD/SLWR/PKTEND
SLCS/FIFOADR [1:0]
tSFA
tFAH
Figure 19. Slave FIFO Asynchronous Address Timing Diagram[16]
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