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ADIS16220/PCBZ 数据表(PDF) 11 Page - Analog Devices |
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ADIS16220/PCBZ 数据表(HTML) 11 Page - Analog Devices |
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11 / 16 page ![]() Preliminary Technical Data ADIS16220 Rev. PrE | Page 11 of 16 READING DATA FROM THE CAPTURE BUFFER Initiate a manual capture command by setting GLOB_CMD[11] = 1 (DIN = 0xBF08). Wait for DIO1 to go high and then low before using the SPI port. When the capture is complete, the first data samples load into the CAPT_BUFx registers and 0x0000 loads into the index pointer (CAPT_PNTR). The index pointer determines which data samples load into the CAPT_BUFx registers. For example, writing 0x0138 to the CAPT_PNTR register (DIN = 0x9A38, DIN = 0x9B01) causes the 313th sample in the buffer memory to load into the CAPT_BUFx registers. CAPT_BUFA ACCELERATION CAPTURE BUFFER CAPT_PNTR 1023 0 Figure 14. Acceleration Capture Buffer Structure and Operation; CAPT_BUF1 (AIN1) and CAPT_BUF2 (AIN2) Use Similar Structures Table 9. CAPT_PNTR Bits Descriptions Bit Description (Default = 0x0000) [15:10] Not used [9:0] Data bits The index pointer automatically increments with a CAPT_BUFA, CAPT_BUF1, or CAPT_BUF2 read command. In the master processor firmware, the loop may appear similar to the following: Data(0) = spi_reg_read(0x14) For n = 0 to 1023 Data(n) = spi_reg_read(0x14); n = n + 1; end Output Data Format The CAPT_BUFA and CAPT_PEAKA registers use a 14-bit, twos complement format to accommodate acceleration in both direc- tions (positive and negative). In addition to the acceleration data, a capture event also produces analog input data (CAPT_BUF1, CAPT_BUF2), power supply data (CAPT_SUPPLY), temperature data (CAPT_TEMP), the peak acceleration level (CAPT_PEAKA) and the peak analog input levels (CAPT_PEAK1, CAPT_PEAK2) in the captured data. Table 10. Capture Output Register Formats Register Bits Format Scale CAPT_SUPPLY 12 Binary, 0 V = 0 LSB 1.22 mV CAPT_TEMP 12 Binary, 25°C = 1278 LSB −0.47°C CAPT_BUFA, CAPT_PEAKA 16 Twos complement 19.073 mg CAPT_BUF1, CAPT_BUF2, CAPT_PEAK1, CAPT_PEAK2 16 Twos complement 305.18 μV Table 11. Acceleration Data Format Output (Binary) Hex LSB Acceleration 0000 1110 0101 0001 0x0E56 +3670 +70 g 0000 0000 0000 0001 0x0001 +1 +0.019073 g 0000 0000 0000 0000 0x0000 0 0 1111 1111 1111 1111 0xFFFF −1 −0.019073 g 1111 0001 1010 1101 0xF1AA −3670 −70 g Table 12. Analog Input Data Format Output (Binary) Hex LSB Level (mV) 0000 1100 1100 1101 0x0CCD +3277 VDD/2 + 1000 0000 0000 0000 0001 0x0001 +1 VDD/2 + 0.305 0000 0000 0000 0000 0x0000 0 VDD/2 1111 1111 1111 1111 0xFFFF −1 VDD/2 − 0.305 1111 0011 0011 0010 0xF332 -3277 VDD/2 − 1000 Power Supply Voltage (VS) Equation VS = (CAPT_SUPPLY) × 0.001221 V/LSB = +3.3 V where CAPT_SUPPLY = 2703 LSB. Temperature Equation Temperature = (1278 − CAPT_TEMP) × 0.47°C/LSB + 25°C. For example, when CAPT_TEMP = 1331, the result is 0.1°C. CAPTURE MODE CONFIGURATION The CAPT_CTRL register provides three different options for triggering a data capture: manual, automatic, and event. It also offers an option for placing the device in a low power, shutdown mode in between capture events. This setting adds approximately 2.3 ms to the total capture time relationship: ) flash with ( 2 1024 184 , 97 1 516 . 0 ) flash no ( 2 1024 184 , 97 1 014 . 0 _ _ CNT AVG C CNT AVG C T T Table 13. CAPT_CTRL Bit Descriptions Bit Description (Default = 0x0020) [15:7] Not used [6] Automatically store capture buffers to flash upon alarm trigger (1 = enabled) [5:4] Pre-event capture length 00 = 64 samples 01 = 128 samples 10 = 256 samples 11 = 512 samples [3:2] Capture mode 00 = manual: use GLOB_CMD[11] to start capture 01 = automatic: use CAPT_PRD[9:0] to set capture period 10 = event: continuously monitor data for the conditions set in ALM_CTRL, ALM_MAGA, ALM_MAG1, and ALM_MAG2. 11 = not used [1] Power-down between capture events 1 = enabled, which requires CS toggle to wake up [0] Not used |
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