LSM303DLH datasheet(32/47 Pages) STMICROELECTRONICS

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Registers description

LSM303DLH

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Doc ID 16941 Rev 1

9.1.4

CTRL_REG4_A (23h)

Table 27.

CTRL_REG3_A description

IHL

Interrupt active high, low. Default value: 0

(0: active high; 1:active low)

PP_OD

Push-pull/open drain selection on interrupt pad. Default value 0.

(0: push-pull; 1: open drain)

LIR2

Latch interrupt request on INT2_SRC register, with INT2_SRC register cleared by

reading INT2_SRC itself. Default value: 0.

(0: interrupt request not latched; 1: interrupt request latched)

I2_CFG1,

I2_CFG0

Data signal on INT 2 pad control bits. Default value: 00.

(see table below)

LIR1

Latch interrupt request on INT1_SRC register, with INT1_SRC register cleared by

reading INT1_SRC register. Default value: 0.

(0: interrupt request not latched; 1: interrupt request latched)

I1_CFG1,

I1_CFG0

Data signal on INT 1 pad control bits. Default value: 00.

(see table below)

Table 28.

Data signal on INT 1 and INT 2 pad

I1(2)_CFG1

I1(2)_CFG0

INT 1(2) Pad

Interrupt 1 (2) source

Interrupt 1 source OR interrupt 2 source

Data ready

Boot running

Table 29.

CTRL_REG4_A register

BDU

BLE

FS1

FS0

STsign

---

Table 30.

CTRL_REG4_A description

BDU

Block data update. Default value: 0

(0: continuos update; 1: output registers not updated between MSB and LSB reading)

BLE

Big/little endian data selection. Default value 0.

(0: data LSB @ lower address; 1: data MSB @ lower address)

FS1, FS0

Full-scale selection. Default value: 00.

(00: ±2

g; 01: ±4 g; 11: ±8 g)

STsign

Self-test sign. Default value: 00.

(0: self-test plus; 1 self-test minus)

Self-test enable. Default value: 0.

(0: self-test disabled; 1: self-test enabled)

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