LSM303DLH datasheet(41/47 Pages) STMICROELECTRONICS

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LSM303DLH

Registers description

Doc ID 16941 Rev 1

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the first bit of the data stream. The number in parentheses indicates the default value of that

bit.

9.2.4

OUT_X_M (03-04h)

The data output X registers are two 8-bit registers, data output register H and data output

Data output X register H contains the MSB from the measurement result, and data output X

The value stored in these two registers is a 16-bit value in 2’s complement form, whose

range is 0xF800 to 0x07FF. DXRH0 through DXRH7 and DXRL0 through DXRL7 indicate bit

locations, with DXRH and DXRL denoting the bits that are in the data output X registers.

DXRH7 and DXRL7 denote the first bit of the data stream.

In the event the ADC reading overflows or underflows for the given channel, or if there is a

math overflow during the bias measurement, this data register will contain the value -4096 in

2’s complement form. This register value clears after the next valid measurement is made.

The content of this register is the MSB magnetic field data for X-axis.

Table 63.

MR_REG

000

MD1

MD0

Table 64.

MR_REG description

MR7 to MR2

These bits must be cleared for correct operation

MR1 to MR0

Mode select bits. These bits select the operation mode of this device.

Table 65.

Magnetic sensor operating mode

MD1

MD0

Mode

Continuous-conversion mode: the device continuously performs conversions

and places the result in the data register. RDY goes high when new data is

placed in all three registers. After a power-on or a write to the mode or

configuration register, the first measurement set is available from all three data

output registers after a period of 2/fDO, and subsequent measurements are

available at a frequency of fDO, where fDO is the frequency of data output.

Single-conversion mode: the device performs a single measurement, sets RDY

high and returns to sleep mode. Mode register returns to sleep mode bit values.

The measurement remains in the data output register and RDY remains high

until the data output register is read or another conversion is performed.

Sleep mode. Device is placed in sleep mode

Table 66.

OUTXH_M register

DXRH7

DXRH6

DXRH5

DXRH4

DXRH3

DXRH2

DXRH1

DXRH0

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