MPC8544EBVTALG datasheet(25/120 Pages) FREESCALE

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MPC8544E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 3

Freescale Semiconductor

Enhanced Three-Speed Ethernet (eTSEC), MII Management

8.3

SGMII Interface Electrical Characteristics

Each SGMII port features a 4-wire AC-coupled serial link from the dedicated SerDes 2 interface of

MPC8544E as shown in Figure 7, where CTX is the external (on board) AC-coupled capacitor. Each output

pin of the SerDes transmitter differential pair features 50-

Ω output impedance. Each input of the SerDes

receiver differential pair features 50-

Ω on-die termination to SGND_SRDS2 (xcorevss). The reference

circuit of the SerDes transmitter and receiver is shown in Figure 7.

When an eTSEC port is configured to operate in SGMII mode, the parallel interface’s output signals of

this eTSEC port can be left floating. The input signals should be terminated based on the guidelines

described in Section 21.5, “Connection Recommendations,” as long as such termination does not violate

the desired POR configuration requirement on these pins, if applicable.

When operating in SGMII mode, the eTSEC EC_GTX_CLK125 clock is not required for this port. Instead,

SerDes reference clock is required on SD2_REF_CLK and SD2_REF_CLK pins.

8.3.1

AC Requirements for SGMII SD2_REF_CLK and SD2_REF_CLK

Table 23 lists the SGMII SerDes reference clock AC requirements. Please note that SD2_REF_CLK and

SD2_REF_CLK are not intended to be used with, and should not be clocked by, a spread spectrum clock

source.

Input low current (VIN = GND)

IIL

–600

—

μA3

Notes:

1. LVDD supports eTSEC1.

2. TVDD supports eTSEC3.

3. The symbol VIN, in this case, represents the LVIN and TVIN symbols referenced in Table 1 and Table 2.

Table 22. GMII, MII, RMII, RGMII, RTBI, TBI, and FIFO DC Electrical Characteristics

Parameters

Symbol

Min

Max

Unit

Notes

Supply voltage 2.5 V

LVDD/TVDD

2.375

2.625

1, 2

Output high voltage (LVDD/TVDD = Min, IOH = –1.0 mA)

VOH

2.0

—

Output low voltage (LVDD/TVDD = Min, IOL = 1.0 mA)

VOL

—0.4

—

Input high voltage

VIH

1.70

—

Input low voltage

VIL

—0.7

—

Input current (VIN = 0, VIN = LVDD, VIN = TVDD)IIN

—±15

μA

1, 2, 3

Notes:

1. LVDD supports eTSEC1.

2. TVDD supports eTSEC3.

3. The symbol VIN, in this case, represents the LVIN and TVIN symbols referenced in Table 1 and Table 2.

Table 21. GMII, MII, TBI, RMII and FIFO DC Electrical Characteristics (continued)

Parameter

Symbol

Min

Max

Unit

Notes

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