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AS1543/44

Data Sheet - A p p l i c a t i o n I n f o r m a t i o n

Grounding and Layout Considerations

The AS1543/44 has excellent immunity to noise on the power supplies as can be seen by the PSRR vs. Supply Signal

Frequency graph on page 11, however, the following should be considered regarding grounding and PCB layout:

- The PCB should be designed such that the analog and digital sections are confined to separate areas of the

board. This facilitates the use of ground planes that can be separated easily. A minimum etch technique is gener-

ally best for ground planes as it gives the best shielding.

- Pins AGND and GND should be tied to the analog ground plane. Pin DGND should be tied to the digital ground

plane.

- Digital and analog ground planes should be joined at only one place. If the AS1543/44 is in a system where mul-

tiple devices require an AGND-to-DGND connection, the connection should be made at one point – a star ground

point which should be established as close as possible to the AS1543/44.

- Avoid running digital lines under the device as these will couple noise onto the die.

- The analog ground plane should be allowed to run under the AS1543/44 to avoid noise coupling.

- The power supply lines to the AS1543/44 should use as large a trace as possible to provide low-impedance

paths and reduce the effects of glitches on the power supply line.

- Fast-switching signals (e.g., clocks) should be shielded with digital ground to avoid radiating noise to other sec-

tions of the PCB.

- Clock signals should not be run near the analog inputs.

- Avoid crossover of digital and analog signals.

- Traces on opposite sides of the board should run at right angles to each other. This will reduce the effects of

feedthrough through the board. A microstrip technique is the best but is not always possible with a double-sided

board. In this technique, the component side of the board is dedicated to ground planes while signals are placed

on the solder side.

- All analog input channels and the reference input voltage should be decoupled to the ground pin of AGND.

- All analog supplies should be decoupled with 10µF tantalum in parallel with 0.1µF capacitors to GND. To achieve

the best from these decoupling components, they must be placed as close as possible to the device, ideally right

up against the device. The 0.1µF capacitors should be low ESR and ESI (e.g., common ceramic or surface

mount types) which provide a low impedance path to ground at high frequencies to handle transient currents due

to internal logic switching.