STM32F100V8H7B datasheet(71/84 Pages) STMICROELECTRONICS

71 / 84 page

STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB

Electrical characteristics

Doc ID 16455 Rev 2

71/84

Figure 35.

12-bit buffered /non-buffered DAC

The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly

without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the

DAC_CR register.

5.3.18

Temperature sensor characteristics

Offset(3)

Offset error

(difference between measured value

at Code (0x800) and the ideal value =

VREF+/2)

±10

Given for the DAC in 12-bit

configuration

±3

LSB

Given for the DAC in 10-bit at

VREF+ = 3.6 V

±12

LSB

Given for the DAC in 12-bit at

VREF+ = 3.6 V

Gain

error(3)

Gain error

±0.5

Given for the DAC in 12bit

configuration

tSETTLING

(

Settling time (full scale: for a 10-bit

input code transition between the

lowest and the highest input codes

when DAC_OUT reaches final value

±1LSB

µs

CLOAD  50 pF, RLOAD  5 k

Update

rate(3)

Max frequency for a correct

DAC_OUT change when small

variation in the input code (from code i

to i+1LSB)

1MS/s CLOAD  50 pF, RLOAD  5 k

tWAKEUP

(3)

Wakeup time from off state (Setting

the ENx bit in the DAC Control

6.5

µs

CLOAD  50 pF, RLOAD  5 k

input code between lowest and

highest possible ones.

PSRR+ (1)

Power supply rejection ratio (to VDDA)

(static DC measurement

–67

–40

No RLOAD, CLOAD = 50 pF

Guaranteed by characterization, not tested in production.

Guaranteed by design, not tested in production.

Guaranteed by characterization, not tested in production.

Table 45.

DAC characteristics (continued)

Symbol

Parameter

Min

Typ

Max(1)

Unit

Comments

R LOAD

C LOAD

Buffered/Non-buffered DAC

DACx_OUT

Buffer(1)

12-bit

digital to

analog

converter

ai17157

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