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MMA5206WR2 数据表(PDF) 2 Page - Freescale Semiconductor, Inc |
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MMA5206WR2 数据表(HTML) 2 Page - Freescale Semiconductor, Inc |
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2 / 61 page ![]() Sensors 2 Freescale Semiconductor MMA52xxWR Preliminary Figure 1. Application Diagram Device Orientation Figure 2. Device Orientation Diagram External Component Recommendations Ref Des Type Description Purpose C1 Ceramic 2.2 nF, 10%, 50 V minimum, X7R VCC Power Supply Decoupling and Signal Damping C3 Ceramic 470 pF, 10%, 50 V minimum, X7R IDATA Filtering and Signal Damping C2 Ceramic 15 nF, 10%, 50 V minimum, X7R VCC Power Supply Decoupling C4, C5, C6 Ceramic 1 mF, 10%, 10 V minimum, X7R Voltage Regulator Output Capacitor(s) R1 General Purpose 82 Ω, 5%, 200 PPM VCC Filtering and Signal Damping R2 General Purpose 27 Ω, 5%, 200 PPM IDATA Filtering and Signal Damping R3 General Purpose 20 k Ω, 5%, 200 PPM Gate Resistor for External Low Side Daisy Chain FET M1 N-Channel MOSFET — Low Side Daisy Chain Transistor C1 C6 VVBUF VCE VSS C4 C5 VREG VREGA CS SCLK DO DI MMA52xx VSSA VSS VCC VBUF PCM R1 R2 IDATA C3 C2 VSS_OUT R3 M1 Optional for BUS_SW Note: Pin names and references may differ from PSI5 V1.3 pin names and references Daisy Chain X: 0 g EARTH GROUND X: +1 g X: 0 g X: -1 g X: 0 g X: 0 g xxxxxxx xxxxxxx |
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