Description

STM6600 - STM6601

8/51

Doc ID 15453 Rev 7

Figure 6.

Block diagram

1.

Internal pull-up resistor connected to PB input (see Table 5 for precise specifications).

2.

Optional internal pull-up resistor connected to SR input (see Table 5 for precise specifications and Table 10 for detailed

device options).

3.

VTH+

PB

EN (EN)

Smart

logic

Edge detector debounce

SRD logic

GND

CSRD

tREC

generator

INT

RST

PS

HOLD

VCC

VCCLO

VREF

Glitch immunity

PBOUT

AM00237v3

1.5 V

Edge detector debounce

Glitch immunity

+

–

VTH–

+

–

SR

R

PSHOLD

(3)

V

CC

V

CC

R

PB

R

SR

(1)

(2)