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STM6600AS24DM6F 数据表(PDF) 26 Page - STMicroelectronics |
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STM6600AS24DM6F 数据表(HTML) 26 Page - STMicroelectronics |
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26 / 51 page  Waveforms STM6600 - STM6601 26/51 Doc ID 15453 Rev 7 Figure 20. Undervoltage detected for <tSRD 1. VCC goes above VTH+ within tSRD thus power is not disabled after tSRD expires. 2. tSRD period is set by external capacitor CSRD. Figure 21. Undervoltage detected for >tSRD 1. After tSRD expires VCC is still insufficient (below VTH+) thus power is disabled (EN goes low or EN goes high). 2. tSRD period is set by external capacitor CSRD. PB status ignored V CC under- voltage detection ignored VCC-Min VCC LO VCC (1) EN and EN is deasserted accordingly PB status ignored processor interrupt starts power-down sequence processor sets PSHOLD low tSRD(2) set by CSRD tDEBOUNCE tINT_Min tEN_OFF INT VCC undervoltage detected V TH+ V TH– PSHOLD AM00254v1 EN VCC LO VCC-Min PB status ignored VCC is below VTH+ even after tSRD expires thus power is disabled (EN goes low) and PB is monitored for regular startup VCC under- voltage detection ignored INT PS HOLD VCC undervoltage detected VTH+ VTH– VCC (1) PB status ignored t DEBOUNCE t INT_Min t EN_OFF t SRD (2) set by C SRD AM00255v1 |
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