HT83F60 datasheet(38/62 Pages) HOLTEK

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HT83FXX

Rev. 1.30

June 7, 2010

· Watchdog Time-out Reset during Normal Operation

The Watchdog time-out Reset during normal opera-

tion is the same as a hardware RES pin reset except

that the Watchdog time-out flag TO will be set to

²1².

· Watchdog Time-out Reset during Power Down

The Watchdog time-out Reset during Power Down is

a little different from other kinds of reset. Most of the

conditions remain unchanged except that the Pro-

gram Counter and the Stack Pointer will be cleared to

²0² and the TO flag will be set to ²1². Refer to the A.C.

Characteristics for tSST details.

Reset Initial Conditions

The different types of reset described affect the reset

flags in different ways. These flags, known as PDF and

TO are located in the status register and are controlled

by various microcontroller operations, such as the

Power Down function or Watchdog Timer. The reset

flags are shown in the table:

TO PDF

RESET Conditions

RES reset during power-on

RES or LVR reset during normal operation

WDT time-out reset during normal operation

WDT time-out reset during Power Down

Note:

²u² stands for unchanged

The following table indicates the way in which the vari-

ous components of the microcontroller are affected after

a power-on reset occurs.

Item

Condition After RESET

Program Counter

Reset to zero

Interrupts

All interrupts will be disabled

WDT

Clear after reset, WDT begins

counting

Timer

All Timer will be turned off

Prescaler

The Timer Prescaler will be

cleared

Input/Output Ports

I/O ports will be setup as inputs

Stack Pointer

Stack Pointer will point to the top

of the stack

W D T T i m e - o u t

S S T T i m e - o u t

I n t e r n a l R e s e t

t R S T D

WDT Time-out Reset during Normal Operation

Timing Chart

W D T T i m e - o u t

S S T T i m e - o u t

t S S T

WDT Time-out Reset during Power Down

Timing Chart

HT83F60 数据表(PDF) 38 Page - Holtek Semiconductor Inc

HT83F60 数据表(HTML) 38 Page - Holtek Semiconductor Inc

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