HT83F60 datasheet(44/62 Pages) HOLTEK

44 / 62 page

HT83FXX

Rev. 1.30

June 7, 2010

P W M L R e g i s t e r

b 7

b 0

N o t u s e d , r e a d a s " 0 "

P 3

P 2

P 1

P 0

P W M o u t p u t

P u l s e W i d t h M o d u l a t o r D a t a L o w R e g i s t e r

P W M H R e g i s t e r

b 7

b 0

P 1 1 P 1 0

P 9

P 8

P W M o u t p u t

P u l s e W i d t h M o d u l a t o r D a t a H i g h R e g i s t e r

P 7

P 6

P 5

P 4

V o i c e C o n t r o l R e g i s t e r

V O L R e g i s t e r

b 7

b 0

N o t u s e d , r e a d a s " 0 "

V 0

V 1

V 2

V 3

V O L 2 V O L 1 V O L 0

P W M v o l u m e c o n t r o l

D A C v o l u m e c o n t r o l

Pulse Width Modulation Output

All devices include a single 12-bit PWM function which

can directly drive external audio components such as

speakers.

Pulse Width Modulator Operation

The PWM output is provided on two complimentary out-

puts on the PWM1 and PWM2 pins, providing a differen-

tial output pair and thus capable of higher drive power.

These two pins can directly drive a piezo buzzer or an 8

ohm speaker without using external components. The

PWM outputs can also be used single ended, where the

signal is provided on the PWM1 output, and again can

also be used by itself alone to drive a piezo buzzer or an

8 ohm speaker without external components. This sin-

gle end output drive type is chosen using the Sin-

gle_PWM bit in the PWMCR register.

If the MSB_SIGN bit is low, then the signal that is pro-

vided on PWM1and PWM2 will obtain a GND level volt-

age after setting the PWMCC bit high. If the MSB_SIGN

bit is high, then the signal that is provided on PWM2 and

PWM1 will have a GND level voltage when the PWMCC

bit is set high.

The two PWM outputs will initially be at low levels, and if

the PWM function is stopped will also return to a low

level. If the PWMCC bit changes from low to high then

the PWM function will start running and latch new data.

If the data is not updated then the old value will remain. If

the PWMCC bit changes from high to low, at the end of

the duty cycle, the PWM output will stop.

P W M C R e g i s t e r

b 0

P W M C C

S i n g l e _ P W M

b 7

M S B _ S I G N

D A C

P W M E n a b l e

1 : e n a b l e

0 : d i s a b l e

D A C e n a b l e

1 : e n a b l e

0 : d i s a b l e

L V D d e t e c t i o n f l a g

1 : L V D d e t e c t i o n

0 : L V D n o n - d e t e c t i o n

S i n g l e P W M O u t p u t

1 : s i n g l e o u t p u t

0 : d u a l o u t p u t s

N o t i m p l e m e n t e d , r e a d a s " 0 "

P 1 1 P a r a l l e l D a t a P o l a r i t y

1 : P 1 1 n o n - i n v e r t

0 : P 1 1 i n v e r t

L V D F

Pulse Width Modulator Control Register

S p e a k e r

P W M 1

P W M 2

0 . 0 1 m F *

" * " F o r r e d u c i n g t h e d i g i t a l n o i s e t h a t P W M m a y

c a u s e , c a n c o n s i d e r i n c r e m e n t c a p a c i t o r s .

N o t e :

HT83F60 数据表(PDF) 44 Page - Holtek Semiconductor Inc

HT83F60 数据表(HTML) 44 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62

数据表下载