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PIC16F526-I/P 数据表(PDF) 29 Page - Microchip Technology |
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PIC16F526-I/P 数据表(HTML) 29 Page - Microchip Technology |
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29 / 122 page ![]() 2010 Microchip Technology Inc. DS41326D-page 29 PIC16F526 6.4 I/O Interfacing The equivalent circuit for an I/O port pin is shown in Figure 6-1. All port pins, except RB3 which is input- only, may be used for both input and output operations. For input operations, these ports are non-latching. Any input must be present until read by an input instruction (e.g., MOVF PORTB, W). The outputs are latched and remain unchanged until the output latch is rewritten. To use a port pin as output, the corresponding direction control bit in TRIS must be cleared (= 0). For use as an input, the corresponding TRIS bit must be set. Any I/O pin (except RB3) can be programmed individually as input or output. FIGURE 6-1: BLOCK DIAGRAM OF RB0 AND RB1 (with Weak Pull- up and Wake-up on Change) Data Bus Q D Q CK Q D Q CK WR Port TRIS ‘f’ Data TRIS RD Port W Reg Latch Latch Reset Note 1: I/O pins have protection diodes to VDD and VSS. D CK Q Pin Change RBPU GPPU ADC pin Ebl COMP pin Ebl ADC COMP I/O Pin(1) |
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