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PIC16F526-I/P 数据表(PDF) 17 Page - Microchip Technology |
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PIC16F526-I/P 数据表(HTML) 17 Page - Microchip Technology |
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17 / 122 page  2010 Microchip Technology Inc. DS41326D-page 17 PIC16F526 TABLE 4-1: SPECIAL FUNCTION REGISTER (SFR) SUMMARY Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on Power-on Reset Page # N/A TRIS — — I/O Control Register (PORTB, PORTC) --11 1111 27 N/A OPTION Contains control bits to configure Timer0 and Timer0/WDT prescaler 1111 1111 19 00h INDF Uses contents of FSR to Address Data Memory (not a physical register) xxxx xxxx 22 01h/41h TMR0 Timer0 Module Register xxxx xxxx 37 02h(1) PCL Low order 8 bits of PC 1111 1111 21 03h STATUS RBWUF CWUF PA0 TO PD ZDC C 0001 1xxx 18 04h FSR Indirect Data Memory Address Pointer 100x xxxx 22 05h/45h OSCCAL CAL6 CAL5 CAL4 CAL3 CAL2 CAL1 CAL0 — 1111 111- 20 06h/46h PORTB — — RB5 RB4 RB3 RB2 RB1 RB0 --xx xxxx 27 07h PORTC — — RC5 RC4 RC3 RC2 RC1 RC0 --xx xxxx 28 08h CM1CON0 C1OUT C1OUTEN C1POL C1T0CS C1ON C1NREF C1PREF C1WU q111 1111 63 09h ADCON0 ANS1 ANS0 ADCS1 ADCS0 CHS1 CHS0 GO/DONE ADON 1111 1100 61 0Ah ADRES ADC Conversion Result xxxx xxxx 62 0Bh CM2CON0 C2OUT C2OUTEN C2POL C2PREF2 C2ON C2NREF C2PREF1 C2WU q111 1111 64 0Ch VRCON VREN VROE VRR — VR3 VR2 VR1 VR0 001- 1111 69 21h/61h EECON — — — FREE WRERR WREN WR RD ---0 x000 23 25h/65h EEDATA SELF READ/WRITE DATA xxxx xxxx 23 26h/66h EEADR — — SELF READ/WRITE ADDRESS --xx xxxx 23 Legend: x = unknown, u = unchanged, – = unimplemented, read as '0' (if applicable), q = value depends on condition. Shaded cells = unimplemented or unused Note 1: The upper byte of the Program Counter is not directly accessible. See Section 4.6 “Program Counter” for an explanation of how to access these bits. |
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